FFmpeg
nvenc.c
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1 /*
2  * H.264/HEVC/AV1 hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 #include "config_components.h"
24 
25 #include "nvenc.h"
26 #include "hevc/sei.h"
27 #if CONFIG_AV1_NVENC_ENCODER
28 #include "av1.h"
29 #endif
30 
31 #include "libavutil/hwcontext_cuda.h"
32 #include "libavutil/hwcontext.h"
33 #include "libavutil/cuda_check.h"
34 #include "libavutil/imgutils.h"
35 #include "libavutil/mem.h"
36 #include "libavutil/pixdesc.h"
37 #include "libavutil/timecode_internal.h"
38 #include "libavutil/mathematics.h"
39 #include "libavutil/mastering_display_metadata.h"
40 #include "libavutil/stereo3d.h"
41 #include "libavutil/tdrdi.h"
42 #include "atsc_a53.h"
43 #include "codec_desc.h"
44 #include "encode.h"
45 #include "internal.h"
46 
47 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
48 
49 #define NVENC_CAP 0x30
50 
51 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR)
52 
53 const enum AVPixelFormat ff_nvenc_pix_fmts[] = {
54  AV_PIX_FMT_YUV420P,
55  AV_PIX_FMT_NV12,
56  AV_PIX_FMT_P010,
57  AV_PIX_FMT_YUV444P,
58  AV_PIX_FMT_P012, // Truncated to 10bits
59  AV_PIX_FMT_P016, // Truncated to 10bits
60 #ifdef NVENC_HAVE_422_SUPPORT
61  AV_PIX_FMT_NV16,
62  AV_PIX_FMT_P210,
63  AV_PIX_FMT_P212, // Truncated to 10bits
64  AV_PIX_FMT_P216,
65 #endif
66  AV_PIX_FMT_YUV444P10MSB,
67  AV_PIX_FMT_YUV444P12MSB, // Truncated to 10bits
68  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
69  AV_PIX_FMT_0RGB32,
70  AV_PIX_FMT_RGB32,
71  AV_PIX_FMT_0BGR32,
72  AV_PIX_FMT_BGR32,
73  AV_PIX_FMT_X2RGB10,
74  AV_PIX_FMT_X2BGR10,
75  AV_PIX_FMT_GBRP,
76  AV_PIX_FMT_GBRP10MSB,
77  AV_PIX_FMT_GBRP16, // Truncated to 10bits
78  AV_PIX_FMT_CUDA,
79 #if CONFIG_D3D11VA
80  AV_PIX_FMT_D3D11,
81 #endif
82  AV_PIX_FMT_NONE
83 };
84 
85 const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[] = {
86  HW_CONFIG_ENCODER_FRAMES(CUDA, CUDA),
87  HW_CONFIG_ENCODER_DEVICE(NONE, CUDA),
88 #if CONFIG_D3D11VA
89  HW_CONFIG_ENCODER_FRAMES(D3D11, D3D11VA),
90  HW_CONFIG_ENCODER_DEVICE(NONE, D3D11VA),
91 #endif
92  NULL,
93 };
94 
95 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
96  pix_fmt == AV_PIX_FMT_P012 || \
97  pix_fmt == AV_PIX_FMT_P016 || \
98  pix_fmt == AV_PIX_FMT_P210 || \
99  pix_fmt == AV_PIX_FMT_P212 || \
100  pix_fmt == AV_PIX_FMT_P216 || \
101  pix_fmt == AV_PIX_FMT_YUV444P10MSB || \
102  pix_fmt == AV_PIX_FMT_YUV444P12MSB || \
103  pix_fmt == AV_PIX_FMT_YUV444P16 || \
104  pix_fmt == AV_PIX_FMT_X2RGB10 || \
105  pix_fmt == AV_PIX_FMT_X2BGR10 || \
106  pix_fmt == AV_PIX_FMT_GBRP10MSB || \
107  pix_fmt == AV_PIX_FMT_GBRP16)
108 
109 #define IS_RGB(pix_fmt) (pix_fmt == AV_PIX_FMT_0RGB32 || \
110  pix_fmt == AV_PIX_FMT_RGB32 || \
111  pix_fmt == AV_PIX_FMT_0BGR32 || \
112  pix_fmt == AV_PIX_FMT_BGR32 || \
113  pix_fmt == AV_PIX_FMT_X2RGB10 || \
114  pix_fmt == AV_PIX_FMT_X2BGR10)
115 
116 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
117  pix_fmt == AV_PIX_FMT_YUV444P10MSB || \
118  pix_fmt == AV_PIX_FMT_YUV444P12MSB || \
119  pix_fmt == AV_PIX_FMT_YUV444P16 || \
120  pix_fmt == AV_PIX_FMT_GBRP || \
121  pix_fmt == AV_PIX_FMT_GBRP10MSB || \
122  pix_fmt == AV_PIX_FMT_GBRP16 || \
123  (ctx->rgb_mode == NVENC_RGB_MODE_444 && IS_RGB(pix_fmt)))
124 
125 #define IS_YUV422(pix_fmt) (pix_fmt == AV_PIX_FMT_NV16 || \
126  pix_fmt == AV_PIX_FMT_P210 || \
127  pix_fmt == AV_PIX_FMT_P212 || \
128  pix_fmt == AV_PIX_FMT_P216)
129 
130 #define IS_GBRP(pix_fmt) (pix_fmt == AV_PIX_FMT_GBRP || \
131  pix_fmt == AV_PIX_FMT_GBRP10MSB || \
132  pix_fmt == AV_PIX_FMT_GBRP16)
133 
134 static const struct {
135  NVENCSTATUS nverr;
136  int averr;
137  const char *desc;
138 } nvenc_errors[] = {
139  { NV_ENC_SUCCESS, 0, "success" },
140  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
141  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
142  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
143  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
144  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
145  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
146  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
147  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
148  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
149  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
150  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
151  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
152  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
153  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
154  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
155  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
156  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
157  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
158  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
159  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
160  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
161  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
162  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
163  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
164  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
165 };
166 
167 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
168 {
169  int i;
170  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
171  if (nvenc_errors[i].nverr == err) {
172  if (desc)
173  *desc = nvenc_errors[i].desc;
174  return nvenc_errors[i].averr;
175  }
176  }
177  if (desc)
178  *desc = "unknown error";
179  return AVERROR_UNKNOWN;
180 }
181 
182 static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err,
183  const char *error_string)
184 {
185  NvencContext *ctx = avctx->priv_data;
186  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
187  const char *desc;
188  const char *details = "(no details)";
189  int ret = nvenc_map_error(err, &desc);
190 
191  if (p_nvenc && ctx->nvencoder)
192  details = p_nvenc->nvEncGetLastErrorString(ctx->nvencoder);
193 
194  av_log(avctx, AV_LOG_ERROR, "%s: %s (%d): %s\n", error_string, desc, err, details);
195 
196  return ret;
197 }
198 
199 typedef struct GUIDTuple {
200  const GUID guid;
201  int flags;
202 } GUIDTuple;
203 
204 #define PRESET_ALIAS(alias, name, ...) \
205  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
206 
207 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
208 
209 static void nvenc_map_preset(NvencContext *ctx)
210 {
211  GUIDTuple presets[] = {
212  PRESET(P1),
213  PRESET(P2),
214  PRESET(P3),
215  PRESET(P4),
216  PRESET(P5),
217  PRESET(P6),
218  PRESET(P7),
219  PRESET_ALIAS(SLOW, P7, NVENC_TWO_PASSES),
220  PRESET_ALIAS(MEDIUM, P4, NVENC_ONE_PASS),
221  PRESET_ALIAS(FAST, P1, NVENC_ONE_PASS),
222  };
223 
224  GUIDTuple *t = &presets[ctx->preset];
225 
226  ctx->init_encode_params.presetGUID = t->guid;
227  ctx->flags = t->flags;
228 
229  if (ctx->tuning_info == NV_ENC_TUNING_INFO_LOSSLESS)
230  ctx->flags |= NVENC_LOSSLESS;
231 }
232 
233 #undef PRESET
234 #undef PRESET_ALIAS
235 
236 static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
237 {
238 #if NVENCAPI_CHECK_VERSION(13, 2)
239  const char *minver = "(unknown)";
240 #elif NVENCAPI_CHECK_VERSION(13, 1)
241  const char *minver = "610.00";
242 #elif NVENCAPI_CHECK_VERSION(13, 0)
243  const char *minver = "570.0";
244 #elif NVENCAPI_CHECK_VERSION(12, 2)
245 # if defined(_WIN32) || defined(__CYGWIN__)
246  const char *minver = "551.76";
247 # else
248  const char *minver = "550.54.14";
249 # endif
250 #elif NVENCAPI_CHECK_VERSION(12, 1)
251 # if defined(_WIN32) || defined(__CYGWIN__)
252  const char *minver = "531.61";
253 # else
254  const char *minver = "530.41.03";
255 # endif
256 #elif NVENCAPI_CHECK_VERSION(12, 0)
257 # if defined(_WIN32) || defined(__CYGWIN__)
258  const char *minver = "522.25";
259 # else
260  const char *minver = "520.56.06";
261 # endif
262 #else
263 # if defined(_WIN32) || defined(__CYGWIN__)
264  const char *minver = "471.41";
265 # else
266  const char *minver = "470.57.02";
267 # endif
268 #endif
269  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
270 }
271 
272 #if NVENCAPI_CHECK_VERSION(12, 0)
273 #define to_nv_color_matrix(n) (NV_ENC_VUI_MATRIX_COEFFS)(n)
274 #define to_nv_color_pri(n) (NV_ENC_VUI_COLOR_PRIMARIES)(n)
275 #define to_nv_color_trc(n) (NV_ENC_VUI_TRANSFER_CHARACTERISTIC)(n)
276 #else
277 #define to_nv_color_matrix(n) (uint32_t)(n)
278 #define to_nv_color_pri(n) (uint32_t)(n)
279 #define to_nv_color_trc(n) (uint32_t)(n)
280 #endif
281 
282 static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
283 {
284  NvencContext *ctx = avctx->priv_data;
285  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
286  NVENCSTATUS err;
287  uint32_t nvenc_max_ver;
288  int ret;
289 
290  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
291  if (ret < 0)
292  return ret;
293 
294  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
295  if (ret < 0) {
296  nvenc_print_driver_requirement(avctx, AV_LOG_ERROR);
297  return ret;
298  }
299 
300  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
301  if (err != NV_ENC_SUCCESS)
302  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
303 
304  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
305 
306  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
307  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
308  "Required: %d.%d Found: %d.%d\n",
309  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
310  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
311  nvenc_print_driver_requirement(avctx, AV_LOG_ERROR);
312  return AVERROR(ENOSYS);
313  }
314 
315  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
316 
317  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
318  if (err != NV_ENC_SUCCESS)
319  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
320 
321  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
322 
323  return 0;
324 }
325 
326 static int nvenc_push_context(AVCodecContext *avctx)
327 {
328  NvencContext *ctx = avctx->priv_data;
329  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
330 
331  if (ctx->d3d11_device)
332  return 0;
333 
334  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
335 }
336 
337 static int nvenc_pop_context(AVCodecContext *avctx)
338 {
339  NvencContext *ctx = avctx->priv_data;
340  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
341  CUcontext dummy;
342 
343  if (ctx->d3d11_device)
344  return 0;
345 
346  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
347 }
348 
349 static av_cold int nvenc_open_session(AVCodecContext *avctx)
350 {
351  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
352  NvencContext *ctx = avctx->priv_data;
353  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
354  NVENCSTATUS ret;
355 
356  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
357  params.apiVersion = NVENCAPI_VERSION;
358  if (ctx->d3d11_device) {
359  params.device = ctx->d3d11_device;
360  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
361  } else {
362  params.device = ctx->cu_context;
363  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
364  }
365 
366  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
367  if (ret != NV_ENC_SUCCESS) {
368  ctx->nvencoder = NULL;
369  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
370  }
371 
372  return 0;
373 }
374 
375 static int nvenc_check_codec_support(AVCodecContext *avctx)
376 {
377  NvencContext *ctx = avctx->priv_data;
378  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
379  int i, ret, count = 0;
380  GUID *guids = NULL;
381 
382  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
383 
384  if (ret != NV_ENC_SUCCESS || !count)
385  return AVERROR(ENOSYS);
386 
387  guids = av_malloc(count * sizeof(GUID));
388  if (!guids)
389  return AVERROR(ENOMEM);
390 
391  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
392  if (ret != NV_ENC_SUCCESS) {
393  ret = AVERROR(ENOSYS);
394  goto fail;
395  }
396 
397  ret = AVERROR(ENOSYS);
398  for (i = 0; i < count; i++) {
399  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
400  ret = 0;
401  break;
402  }
403  }
404 
405 fail:
406  av_free(guids);
407 
408  return ret;
409 }
410 
411 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
412 {
413  NvencContext *ctx = avctx->priv_data;
414  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
415  NV_ENC_CAPS_PARAM params = { 0 };
416  int ret, val = 0;
417 
418  params.version = NV_ENC_CAPS_PARAM_VER;
419  params.capsToQuery = cap;
420 
421  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
422 
423  if (ret == NV_ENC_SUCCESS)
424  return val;
425  return 0;
426 }
427 
428 static int nvenc_check_capabilities(AVCodecContext *avctx)
429 {
430  NvencContext *ctx = avctx->priv_data;
431  int tmp, ret;
432 
433  ret = nvenc_check_codec_support(avctx);
434  if (ret < 0) {
435  av_log(avctx, AV_LOG_WARNING, "Codec not supported\n");
436  return ret;
437  }
438 
439  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
440  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
441  av_log(avctx, AV_LOG_WARNING, "YUV444P not supported\n");
442  return AVERROR(ENOSYS);
443  }
444 
445 #ifdef NVENC_HAVE_422_SUPPORT
446  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV422_ENCODE);
447 #else
448  ret = 0;
449 #endif
450  if (IS_YUV422(ctx->data_pix_fmt) && ret <= 0) {
451  av_log(avctx, AV_LOG_WARNING, "YUV422P not supported\n");
452  return AVERROR(ENOSYS);
453  }
454 
455  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
456  if (ctx->flags & NVENC_LOSSLESS && ret <= 0) {
457  av_log(avctx, AV_LOG_WARNING, "Lossless encoding not supported\n");
458  return AVERROR(ENOSYS);
459  }
460 
461  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
462  if (ret < avctx->width) {
463  av_log(avctx, AV_LOG_WARNING, "Width %d exceeds %d\n",
464  avctx->width, ret);
465  return AVERROR(ENOSYS);
466  }
467 
468  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
469  if (ret < avctx->height) {
470  av_log(avctx, AV_LOG_WARNING, "Height %d exceeds %d\n",
471  avctx->height, ret);
472  return AVERROR(ENOSYS);
473  }
474 
475  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
476  if (ret < avctx->max_b_frames) {
477  av_log(avctx, AV_LOG_WARNING, "Max B-frames %d exceed %d\n",
478  avctx->max_b_frames, ret);
479 
480  return AVERROR(ENOSYS);
481  }
482 
483  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
484  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
485  av_log(avctx, AV_LOG_WARNING,
486  "Interlaced encoding is not supported. Supported level: %d\n",
487  ret);
488  return AVERROR(ENOSYS);
489  }
490 
491  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
492  if ((IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) && ret <= 0) {
493  av_log(avctx, AV_LOG_WARNING, "10 bit encode not supported\n");
494  return AVERROR(ENOSYS);
495  }
496 
497  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
498  if (ctx->rc_lookahead > 0 && ret <= 0) {
499  av_log(avctx, AV_LOG_WARNING, "RC lookahead not supported\n");
500  return AVERROR(ENOSYS);
501  }
502 
503  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
504  if (ctx->temporal_aq > 0 && ret <= 0) {
505  av_log(avctx, AV_LOG_WARNING, "Temporal AQ not supported\n");
506  return AVERROR(ENOSYS);
507  }
508 
509  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
510  if (ctx->weighted_pred > 0 && ret <= 0) {
511  av_log (avctx, AV_LOG_WARNING, "Weighted Prediction not supported\n");
512  return AVERROR(ENOSYS);
513  }
514 
515  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
516  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
517  av_log(avctx, AV_LOG_WARNING, "CABAC entropy coding not supported\n");
518  return AVERROR(ENOSYS);
519  }
520 
521  tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : NV_ENC_BFRAME_REF_MODE_DISABLED;
522  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
523  switch (tmp) {
524  case NV_ENC_BFRAME_REF_MODE_DISABLED:
525  break;
526  case NV_ENC_BFRAME_REF_MODE_EACH:
527  if (!(ret & 1)) {
528  av_log(avctx, AV_LOG_WARNING, "Each B frame reference mode is not supported\n");
529  return AVERROR(ENOSYS);
530  }
531  break;
532  case NV_ENC_BFRAME_REF_MODE_MIDDLE:
533  if (!(ret & 2)) {
534  av_log(avctx, AV_LOG_WARNING, "Middle B frame reference mode is not supported\n");
535  return AVERROR(ENOSYS);
536  }
537  break;
538 #ifdef NVENC_HAVE_AV1_HGOP_SUPPORT
539  case NV_ENC_BFRAME_REF_MODE_HIERARCHICAL:
540  if (!(ret & 4)) {
541  av_log(avctx, AV_LOG_WARNING, "Hierarchical B frame reference mode is not supported\n");
542  return AVERROR(ENOSYS);
543  }
544  break;
545 #endif
546  default:
547  av_log(avctx, AV_LOG_ERROR, "Invalid b_ref_mode value %d\n", tmp);
548  return AVERROR(EINVAL);
549  }
550 
551  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MULTIPLE_REF_FRAMES);
552  if(avctx->refs != NV_ENC_NUM_REF_FRAMES_AUTOSELECT && ret <= 0) {
553  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames are not supported by the device\n");
554  return AVERROR(ENOSYS);
555  }
556 
557  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SINGLE_SLICE_INTRA_REFRESH);
558  if(ctx->single_slice_intra_refresh && ret <= 0) {
559  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh not supported by the device\n");
560  return AVERROR(ENOSYS);
561  }
562 
563  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_INTRA_REFRESH);
564  if((ctx->intra_refresh || ctx->single_slice_intra_refresh) && ret <= 0) {
565  av_log(avctx, AV_LOG_WARNING, "Intra refresh not supported by the device\n");
566  return AVERROR(ENOSYS);
567  }
568 
569  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CONSTRAINED_ENCODING);
570  if(ctx->constrained_encoding && ret <= 0) {
571  av_log(avctx, AV_LOG_WARNING, "Constrained encoding not supported by the device\n");
572  return AVERROR(ENOSYS);
573  }
574 
575 #if defined(NVENC_HAVE_TEMPORAL_FILTER) || defined(NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER)
576  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_FILTER);
577  if(ctx->tf_level > 0 && ret <= 0) {
578  av_log(avctx, AV_LOG_WARNING, "Temporal filtering not supported by the device\n");
579  return AVERROR(ENOSYS);
580  }
581 #endif
582 
583 #ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
584  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD_LEVEL);
585  if(ctx->rc_lookahead > 0 && ctx->lookahead_level > 0 &&
586  ctx->lookahead_level != NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT &&
587  ctx->lookahead_level > ret)
588  {
589  av_log(avctx, AV_LOG_WARNING, "Lookahead level not supported. Maximum level: %d\n", ret);
590  return AVERROR(ENOSYS);
591  }
592 #endif
593 
594 #ifdef NVENC_HAVE_UNIDIR_B
595  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_UNIDIRECTIONAL_B);
596  if(ctx->unidir_b && ret <= 0) {
597  av_log(avctx, AV_LOG_WARNING, "Unidirectional B-Frames not supported by the device\n");
598  return AVERROR(ENOSYS);
599  }
600 #endif
601 
602  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
603 
604 #ifdef NVENC_HAVE_MVHEVC
605  ctx->multiview_supported = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MVHEVC_ENCODE) > 0;
606  if (avctx->codec_id == AV_CODEC_ID_HEVC &&
607  ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN &&
608  !ctx->multiview_supported) {
609  av_log(avctx, AV_LOG_WARNING, "Multiview not supported by the device\n");
610  return AVERROR(ENOSYS);
611  }
612 #endif
613 
614  return 0;
615 }
616 
617 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
618 {
619  NvencContext *ctx = avctx->priv_data;
620  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
621  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
622  char name[128] = { 0};
623  int major, minor, ret;
624  CUdevice cu_device;
625  int loglevel = AV_LOG_VERBOSE;
626 
627  if (ctx->device == LIST_DEVICES)
628  loglevel = AV_LOG_INFO;
629 
630  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
631  if (ret < 0)
632  return ret;
633 
634  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
635  if (ret < 0)
636  return ret;
637 
638  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
639  if (ret < 0)
640  return ret;
641 
642  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
643  if (((major << 4) | minor) < NVENC_CAP) {
644  av_log(avctx, loglevel, "does not support NVENC\n");
645  goto fail;
646  }
647 
648  if (ctx->device != idx && ctx->device != ANY_DEVICE)
649  return -1;
650 
651  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
652  if (ret < 0)
653  goto fail;
654 
655  ctx->cu_context = ctx->cu_context_internal;
656  ctx->cu_stream = NULL;
657 
658  if ((ret = nvenc_pop_context(avctx)) < 0)
659  goto fail2;
660 
661  if ((ret = nvenc_open_session(avctx)) < 0)
662  goto fail2;
663 
664  if ((ret = nvenc_check_capabilities(avctx)) < 0)
665  goto fail3;
666 
667  av_log(avctx, loglevel, "supports NVENC\n");
668 
669  dl_fn->nvenc_device_count++;
670 
671  if (ctx->device == idx || ctx->device == ANY_DEVICE)
672  return 0;
673 
674 fail3:
675  if ((ret = nvenc_push_context(avctx)) < 0)
676  return ret;
677 
678  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
679  ctx->nvencoder = NULL;
680 
681  if ((ret = nvenc_pop_context(avctx)) < 0)
682  return ret;
683 
684 fail2:
685  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
686  ctx->cu_context_internal = NULL;
687 
688 fail:
689  return AVERROR(ENOSYS);
690 }
691 
692 static av_cold int nvenc_setup_device(AVCodecContext *avctx)
693 {
694  NvencContext *ctx = avctx->priv_data;
695  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
696 
697  switch (avctx->codec->id) {
698  case AV_CODEC_ID_H264:
699  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
700  break;
701  case AV_CODEC_ID_HEVC:
702  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
703  break;
704 #if CONFIG_AV1_NVENC_ENCODER
705  case AV_CODEC_ID_AV1:
706  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_AV1_GUID;
707  break;
708 #endif
709  default:
710  return AVERROR_BUG;
711  }
712 
713  nvenc_map_preset(ctx);
714 
715  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
716  AVHWFramesContext *frames_ctx;
717  AVHWDeviceContext *hwdev_ctx;
718  AVCUDADeviceContext *cuda_device_hwctx = NULL;
719 #if CONFIG_D3D11VA
720  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
721 #endif
722  int ret;
723 
724  if (avctx->hw_frames_ctx) {
725  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
726  if (frames_ctx->format == AV_PIX_FMT_CUDA)
727  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
728 #if CONFIG_D3D11VA
729  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
730  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
731 #endif
732  else
733  return AVERROR(EINVAL);
734  } else if (avctx->hw_device_ctx) {
735  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
736  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
737  cuda_device_hwctx = hwdev_ctx->hwctx;
738 #if CONFIG_D3D11VA
739  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
740  d3d11_device_hwctx = hwdev_ctx->hwctx;
741 #endif
742  else
743  return AVERROR(EINVAL);
744  } else {
745  return AVERROR(EINVAL);
746  }
747 
748  if (cuda_device_hwctx) {
749  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
750  ctx->cu_stream = cuda_device_hwctx->stream;
751  }
752 #if CONFIG_D3D11VA
753  else if (d3d11_device_hwctx) {
754  ctx->d3d11_device = d3d11_device_hwctx->device;
755  ID3D11Device_AddRef(ctx->d3d11_device);
756  }
757 #endif
758 
759  ret = nvenc_open_session(avctx);
760  if (ret < 0)
761  return ret;
762 
763  ret = nvenc_check_capabilities(avctx);
764  if (ret < 0) {
765  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
766  return ret;
767  }
768  } else {
769  int i, nb_devices = 0;
770 
771  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
772  return AVERROR_UNKNOWN;
773 
774  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
775  return AVERROR_UNKNOWN;
776 
777  if (!nb_devices) {
778  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
779  return AVERROR_EXTERNAL;
780  }
781 
782  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
783 
784  dl_fn->nvenc_device_count = 0;
785  for (i = 0; i < nb_devices; ++i) {
786  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
787  return 0;
788  }
789 
790  if (ctx->device == LIST_DEVICES)
791  return AVERROR_EXIT;
792 
793  if (!dl_fn->nvenc_device_count) {
794  av_log(avctx, AV_LOG_FATAL, "No capable devices found\n");
795  return AVERROR_EXTERNAL;
796  }
797 
798  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
799  return AVERROR(EINVAL);
800  }
801 
802  return 0;
803 }
804 
805 static av_cold void set_constqp(AVCodecContext *avctx)
806 {
807  NvencContext *ctx = avctx->priv_data;
808  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
809 #if CONFIG_AV1_NVENC_ENCODER
810  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
811 #else
812  int qmax = 51;
813 #endif
814 
815  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
816 
817  if (ctx->init_qp_p >= 0) {
818  rc->constQP.qpInterP = ctx->init_qp_p;
819  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
820  rc->constQP.qpIntra = ctx->init_qp_i;
821  rc->constQP.qpInterB = ctx->init_qp_b;
822  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
823  rc->constQP.qpIntra = av_clip(
824  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
825  rc->constQP.qpInterB = av_clip(
826  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
827  } else {
828  rc->constQP.qpIntra = rc->constQP.qpInterP;
829  rc->constQP.qpInterB = rc->constQP.qpInterP;
830  }
831  } else if (ctx->cqp >= 0) {
832  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
833  if (avctx->b_quant_factor != 0.0)
834  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
835  if (avctx->i_quant_factor != 0.0)
836  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
837  }
838 
839  avctx->qmin = ctx->qmin = -1;
840  avctx->qmax = ctx->qmax = -1;
841 }
842 
843 static av_cold void set_vbr(AVCodecContext *avctx)
844 {
845  NvencContext *ctx = avctx->priv_data;
846  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
847  int qp_inter_p;
848 #if CONFIG_AV1_NVENC_ENCODER
849  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
850 #else
851  int qmax = 51;
852 #endif
853 
854  if (avctx->qmin >= 0 || avctx->qmax >= 0)
855  av_log(avctx, AV_LOG_WARNING, "Passing qmin/qmax via global AVCodecContext options. Use encoder options instead.\n");
856 
857  if (avctx->qmin >= 0 && ctx->qmin < 0)
858  ctx->qmin = avctx->qmin;
859  if (avctx->qmax >= 0 && ctx->qmax < 0)
860  ctx->qmax = avctx->qmax;
861  avctx->qmin = ctx->qmin;
862  avctx->qmax = ctx->qmax;
863 
864  if (ctx->qmin >= 0 && ctx->qmax >= 0) {
865  rc->enableMinQP = 1;
866  rc->enableMaxQP = 1;
867 
868  rc->minQP.qpInterB = ctx->qmin;
869  rc->minQP.qpInterP = ctx->qmin;
870  rc->minQP.qpIntra = ctx->qmin;
871 
872  rc->maxQP.qpInterB = ctx->qmax;
873  rc->maxQP.qpInterP = ctx->qmax;
874  rc->maxQP.qpIntra = ctx->qmax;
875 
876  qp_inter_p = (ctx->qmax + 3 * ctx->qmin) / 4; // biased towards Qmin
877  } else if (ctx->qmin >= 0) {
878  rc->enableMinQP = 1;
879 
880  rc->minQP.qpInterB = ctx->qmin;
881  rc->minQP.qpInterP = ctx->qmin;
882  rc->minQP.qpIntra = ctx->qmin;
883 
884  qp_inter_p = ctx->qmin;
885  } else {
886  qp_inter_p = 26; // default to 26
887  }
888 
889  rc->enableInitialRCQP = 1;
890 
891  if (ctx->init_qp_p < 0) {
892  rc->initialRCQP.qpInterP = qp_inter_p;
893  } else {
894  rc->initialRCQP.qpInterP = ctx->init_qp_p;
895  }
896 
897  if (ctx->init_qp_i < 0) {
898  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
899  rc->initialRCQP.qpIntra = av_clip(
900  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
901  } else {
902  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
903  }
904  } else {
905  rc->initialRCQP.qpIntra = ctx->init_qp_i;
906  }
907 
908  if (ctx->init_qp_b < 0) {
909  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
910  rc->initialRCQP.qpInterB = av_clip(
911  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
912  } else {
913  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
914  }
915  } else {
916  rc->initialRCQP.qpInterB = ctx->init_qp_b;
917  }
918 }
919 
920 static av_cold void set_lossless(AVCodecContext *avctx)
921 {
922  NvencContext *ctx = avctx->priv_data;
923  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
924 
925  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
926  rc->constQP.qpInterB = 0;
927  rc->constQP.qpInterP = 0;
928  rc->constQP.qpIntra = 0;
929 
930  avctx->qmin = ctx->qmin = -1;
931  avctx->qmax = ctx->qmax = -1;
932 }
933 
934 static void nvenc_override_rate_control(AVCodecContext *avctx)
935 {
936  NvencContext *ctx = avctx->priv_data;
937  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
938 
939  switch (ctx->rc) {
940  case NV_ENC_PARAMS_RC_CONSTQP:
941  set_constqp(avctx);
942  return;
943  case NV_ENC_PARAMS_RC_VBR:
944  set_vbr(avctx);
945  break;
946  case NV_ENC_PARAMS_RC_CBR:
947  break;
948  }
949 
950  rc->rateControlMode = ctx->rc;
951 }
952 
953 static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
954 {
955  NvencContext *ctx = avctx->priv_data;
956  // default minimum of 4 surfaces
957  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
958  // another multiply by 2 to avoid blocking next PBB group
959  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
960 
961  // lookahead enabled
962  if (ctx->rc_lookahead > 0) {
963  // +1 is to account for lkd_bound calculation later
964  // +4 is to allow sufficient pipelining with lookahead
965  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
966  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
967  {
968  av_log(avctx, AV_LOG_WARNING,
969  "Defined rc_lookahead requires more surfaces, "
970  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
971  }
972  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
973  } else {
974  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
975  {
976  av_log(avctx, AV_LOG_WARNING,
977  "Defined b-frame requires more surfaces, "
978  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
979  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
980  }
981  else if (ctx->nb_surfaces <= 0)
982  ctx->nb_surfaces = nb_surfaces;
983  // otherwise use user specified value
984  }
985 
986  ctx->nb_surfaces = FFMAX(1, FFMIN(MAX_REGISTERED_FRAMES, ctx->nb_surfaces));
987  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
988 
989  // Output in the worst case will only start when the surface buffer is completely full.
990  // Hence we need to keep at least the max amount of surfaces plus the max reorder delay around.
991  ctx->frame_data_array_nb = FFMAX(ctx->nb_surfaces, ctx->nb_surfaces + ctx->encode_config.frameIntervalP - 1);
992 
993  return 0;
994 }
995 
996 static av_cold int nvenc_setup_rate_control(AVCodecContext *avctx)
997 {
998  NvencContext *ctx = avctx->priv_data;
999 
1000  if (avctx->global_quality > 0) {
1001  av_log(avctx, AV_LOG_ERROR, "Using global_quality with nvenc is not supported. Use qp instead.\n");
1002  return AVERROR(EINVAL);
1003  }
1004 
1005  if (avctx->bit_rate > 0) {
1006  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
1007  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1008  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
1009  }
1010 
1011  if (avctx->rc_max_rate > 0)
1012  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1013 
1014  ctx->encode_config.rcParams.multiPass = ctx->multipass;
1015 
1016  if (ctx->flags & NVENC_ONE_PASS)
1017  ctx->encode_config.rcParams.multiPass = NV_ENC_MULTI_PASS_DISABLED;
1018  if (ctx->flags & NVENC_TWO_PASSES)
1019  ctx->encode_config.rcParams.multiPass = NV_ENC_TWO_PASS_FULL_RESOLUTION;
1020 
1021  if (ctx->rc < 0) {
1022  if (ctx->cqp >= 0) {
1023  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1024  } else if (ctx->quality >= 0.0f) {
1025  ctx->rc = NV_ENC_PARAMS_RC_VBR;
1026  }
1027  }
1028 
1029  ctx->encode_config.rcParams.cbQPIndexOffset = ctx->qp_cb_offset;
1030  ctx->encode_config.rcParams.crQPIndexOffset = ctx->qp_cr_offset;
1031 
1032  if (avctx->codec->id == AV_CODEC_ID_AV1 &&
1033  ctx->qp_cr_offset != ctx->qp_cb_offset)
1034  av_log(avctx, AV_LOG_WARNING,
1035  "av1_nvenc: qp_cr_offset is currently ignored by the NVENC driver "
1036  "(deltaQ_v_ac is forced equal to deltaQ_u_ac); only qp_cb_offset "
1037  "takes effect.\n");
1038 
1039  if (ctx->ldkfs)
1040  ctx->encode_config.rcParams.lowDelayKeyFrameScale = ctx->ldkfs;
1041 
1042  if (ctx->flags & NVENC_LOSSLESS) {
1043  set_lossless(avctx);
1044  } else if (ctx->rc >= 0) {
1045  nvenc_override_rate_control(avctx);
1046  } else {
1047  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
1048  set_vbr(avctx);
1049  }
1050 
1051  if (avctx->rc_buffer_size > 0) {
1052  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
1053  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1054  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
1055  }
1056 
1057  if (ctx->aq) {
1058  ctx->encode_config.rcParams.enableAQ = 1;
1059  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
1060  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
1061  }
1062 
1063  if (ctx->temporal_aq) {
1064  ctx->encode_config.rcParams.enableTemporalAQ = 1;
1065  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
1066  }
1067 
1068  if (ctx->rc_lookahead > 0) {
1069  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
1070  ctx->encode_config.frameIntervalP - 4;
1071 
1072  if (lkd_bound < 0) {
1073  ctx->encode_config.rcParams.enableLookahead = 0;
1074  av_log(avctx, AV_LOG_WARNING,
1075  "Lookahead not enabled. Increase buffer delay (-delay).\n");
1076  } else {
1077  ctx->encode_config.rcParams.enableLookahead = 1;
1078  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
1079  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
1080  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
1081  av_log(avctx, AV_LOG_VERBOSE,
1082  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
1083  ctx->encode_config.rcParams.lookaheadDepth,
1084  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
1085  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
1086  if (ctx->encode_config.rcParams.lookaheadDepth < ctx->rc_lookahead)
1087  av_log(avctx, AV_LOG_WARNING, "Clipping lookahead depth to %d (from %d) due to lack of surfaces/delay",
1088  ctx->encode_config.rcParams.lookaheadDepth, ctx->rc_lookahead);
1089 
1090 #ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
1091  if (ctx->lookahead_level >= 0) {
1092  switch (ctx->lookahead_level) {
1093  case NV_ENC_LOOKAHEAD_LEVEL_0:
1094  case NV_ENC_LOOKAHEAD_LEVEL_1:
1095  case NV_ENC_LOOKAHEAD_LEVEL_2:
1096  case NV_ENC_LOOKAHEAD_LEVEL_3:
1097  case NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT:
1098  break;
1099  default:
1100  av_log(avctx, AV_LOG_ERROR, "Invalid lookahead level.\n");
1101  return AVERROR(EINVAL);
1102  }
1103 
1104  ctx->encode_config.rcParams.lookaheadLevel = ctx->lookahead_level;
1105  }
1106 #endif
1107  }
1108  }
1109 
1110  if (ctx->strict_gop) {
1111  ctx->encode_config.rcParams.strictGOPTarget = 1;
1112  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
1113  }
1114 
1115  if (ctx->nonref_p)
1116  ctx->encode_config.rcParams.enableNonRefP = 1;
1117 
1118  if (ctx->zerolatency)
1119  ctx->encode_config.rcParams.zeroReorderDelay = 1;
1120 
1121  if (ctx->quality) {
1122  //convert from float to fixed point 8.8
1123  int tmp_quality = (int)(ctx->quality * 256.0f);
1124  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
1125  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
1126 
1127  av_log(avctx, AV_LOG_VERBOSE, "CQ(%d) mode enabled.\n", tmp_quality);
1128 
1129  // CQ mode shall discard avg bitrate/vbv buffer size and honor only max bitrate
1130  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate = 0;
1131  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size = 0;
1132  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1133  }
1134 
1135  return 0;
1136 }
1137 
1138 static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
1139 {
1140  NvencContext *ctx = avctx->priv_data;
1141  NV_ENC_CONFIG *cc = &ctx->encode_config;
1142  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
1143  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
1144 
1145  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1146 
1147  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1148  vui->colourMatrix = to_nv_color_matrix(AVCOL_SPC_BT470BG);
1149  vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1150  vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1151  vui->videoFullRangeFlag = 0;
1152  } else {
1153  vui->colourMatrix = to_nv_color_matrix(IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace);
1154  vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1155  vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1156  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1157  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1158  }
1159 
1160  vui->colourDescriptionPresentFlag =
1161  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1162 
1163  vui->videoSignalTypePresentFlag =
1164  (vui->colourDescriptionPresentFlag
1165  || vui->videoFormat != 5
1166  || vui->videoFullRangeFlag != 0);
1167 
1168  if (ctx->max_slice_size > 0) {
1169  h264->sliceMode = 1;
1170  h264->sliceModeData = ctx->max_slice_size;
1171  } else {
1172  h264->sliceMode = 3;
1173  h264->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1174  }
1175 
1176  if (ctx->intra_refresh) {
1177  h264->enableIntraRefresh = 1;
1178  h264->intraRefreshPeriod = cc->gopLength;
1179  h264->intraRefreshCnt = cc->gopLength - 1;
1180  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1181  h264->outputRecoveryPointSEI = 1;
1182  h264->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1183  }
1184 
1185  if (ctx->constrained_encoding)
1186  h264->enableConstrainedEncoding = 1;
1187 
1188  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1189  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1190  h264->outputAUD = ctx->aud;
1191 
1192  if (ctx->dpb_size >= 0) {
1193  /* 0 means "let the hardware decide" */
1194  h264->maxNumRefFrames = ctx->dpb_size;
1195  }
1196 
1197  h264->idrPeriod = cc->gopLength;
1198 
1199  if (IS_CBR(cc->rcParams.rateControlMode)) {
1200  /* Older SDKs use outputBufferingPeriodSEI to control filler data */
1201  h264->outputBufferingPeriodSEI = ctx->cbr_padding;
1202 
1203  h264->enableFillerDataInsertion = ctx->cbr_padding;
1204  }
1205 
1206  h264->outputPictureTimingSEI = 1;
1207 
1208  if (ctx->flags & NVENC_LOSSLESS) {
1209  h264->qpPrimeYZeroTransformBypassFlag = 1;
1210  } else {
1211  switch(ctx->profile) {
1212  case NV_ENC_H264_PROFILE_BASELINE:
1213  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
1214  avctx->profile = AV_PROFILE_H264_BASELINE;
1215  if (cc->frameIntervalP > 1) {
1216  av_log(avctx, AV_LOG_WARNING,
1217  "B-frames are not supported by H.264 Baseline profile, disabling.\n");
1218  cc->frameIntervalP = 1;
1219  }
1220  break;
1221  case NV_ENC_H264_PROFILE_MAIN:
1222  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
1223  avctx->profile = AV_PROFILE_H264_MAIN;
1224  break;
1225  case NV_ENC_H264_PROFILE_HIGH:
1226  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
1227  avctx->profile = AV_PROFILE_H264_HIGH;
1228  break;
1229 #ifdef NVENC_HAVE_H264_10BIT_SUPPORT
1230  case NV_ENC_H264_PROFILE_HIGH_10:
1231  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_10_GUID;
1232  avctx->profile = AV_PROFILE_H264_HIGH_10;
1233  break;
1234 #endif
1235 #ifdef NVENC_HAVE_422_SUPPORT
1236  case NV_ENC_H264_PROFILE_HIGH_422:
1237  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_422_GUID;
1238  avctx->profile = AV_PROFILE_H264_HIGH_422;
1239  break;
1240 #endif
1241  case NV_ENC_H264_PROFILE_HIGH_444P:
1242  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1243  avctx->profile = AV_PROFILE_H264_HIGH_444_PREDICTIVE;
1244  break;
1245  }
1246  }
1247 
1248 #ifdef NVENC_HAVE_H264_10BIT_SUPPORT
1249  // force setting profile as high10 if input is 10 bit or if it should be encoded as 10 bit
1250  if (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) {
1251  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_10_GUID;
1252  avctx->profile = AV_PROFILE_H264_HIGH_10;
1253  }
1254 #endif
1255 
1256  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
1257  if (IS_YUV444(ctx->data_pix_fmt)) {
1258  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1259  avctx->profile = AV_PROFILE_H264_HIGH_444_PREDICTIVE;
1260  }
1261 
1262 #ifdef NVENC_HAVE_422_SUPPORT
1263  // force setting profile as high422p if input is AV_PIX_FMT_YUV422P
1264  if (IS_YUV422(ctx->data_pix_fmt)) {
1265  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_422_GUID;
1266  avctx->profile = AV_PROFILE_H264_HIGH_422;
1267  }
1268 #endif
1269 
1270  vui->bitstreamRestrictionFlag = cc->gopLength != 1 || avctx->profile < AV_PROFILE_H264_HIGH;
1271 
1272  h264->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : IS_YUV422(ctx->data_pix_fmt) ? 2 : 1;
1273 
1274  h264->level = ctx->level;
1275 
1276 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1277  h264->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1278  h264->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1279 #endif
1280 
1281  if (ctx->coder >= 0)
1282  h264->entropyCodingMode = ctx->coder;
1283 
1284  if (ctx->b_ref_mode >= 0)
1285  h264->useBFramesAsRef = ctx->b_ref_mode;
1286 
1287  h264->numRefL0 = avctx->refs;
1288  h264->numRefL1 = avctx->refs;
1289 
1290 #ifdef NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER
1291  if (ctx->tf_level >= 0) {
1292  h264->tfLevel = ctx->tf_level;
1293 
1294  switch (ctx->tf_level)
1295  {
1296  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1297  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1298  break;
1299  default:
1300  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1301  return AVERROR(EINVAL);
1302  }
1303 
1304  if (ctx->encode_config.frameIntervalP < 5)
1305  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1306  }
1307 #endif
1308 
1309 #ifdef NVENC_HAVE_TIME_CODE
1310  if (ctx->s12m_tc)
1311  h264->enableTimeCode = 1;
1312 #endif
1313 
1314  return 0;
1315 }
1316 
1317 static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
1318 {
1319  NvencContext *ctx = avctx->priv_data;
1320  NV_ENC_CONFIG *cc = &ctx->encode_config;
1321  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1322  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1323 
1324  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1325 
1326  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1327  vui->colourMatrix = to_nv_color_matrix(AVCOL_SPC_BT470BG);
1328  vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1329  vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1330  vui->videoFullRangeFlag = 0;
1331  } else {
1332  vui->colourMatrix = to_nv_color_matrix(IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace);
1333  vui->colourPrimaries = to_nv_color_pri(avctx->color_primaries);
1334  vui->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1335  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1336  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1337  }
1338 
1339  vui->colourDescriptionPresentFlag =
1340  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1341 
1342  vui->videoSignalTypePresentFlag =
1343  (vui->colourDescriptionPresentFlag
1344  || vui->videoFormat != 5
1345  || vui->videoFullRangeFlag != 0);
1346 
1347  if (ctx->max_slice_size > 0) {
1348  hevc->sliceMode = 1;
1349  hevc->sliceModeData = ctx->max_slice_size;
1350  } else {
1351  hevc->sliceMode = 3;
1352  hevc->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1353  }
1354 
1355  if (ctx->intra_refresh) {
1356  hevc->enableIntraRefresh = 1;
1357  hevc->intraRefreshPeriod = cc->gopLength;
1358  hevc->intraRefreshCnt = cc->gopLength - 1;
1359  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1360 #ifdef NVENC_HAVE_HEVC_OUTPUT_RECOVERY_POINT_SEI
1361  hevc->outputRecoveryPointSEI = 1;
1362 #endif
1363  hevc->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1364  }
1365 
1366 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
1367  ctx->mdm = hevc->outputMasteringDisplay = !!av_frame_side_data_get(avctx->decoded_side_data,
1368  avctx->nb_decoded_side_data,
1369  AV_FRAME_DATA_MASTERING_DISPLAY_METADATA);
1370  ctx->cll = hevc->outputMaxCll = !!av_frame_side_data_get(avctx->decoded_side_data,
1371  avctx->nb_decoded_side_data,
1372  AV_FRAME_DATA_CONTENT_LIGHT_LEVEL);
1373 #endif
1374 
1375  if (ctx->constrained_encoding)
1376  hevc->enableConstrainedEncoding = 1;
1377 
1378  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1379  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1380  hevc->outputAUD = ctx->aud;
1381 
1382  if (ctx->dpb_size >= 0) {
1383  /* 0 means "let the hardware decide" */
1384  hevc->maxNumRefFramesInDPB = ctx->dpb_size;
1385  }
1386 
1387  hevc->idrPeriod = cc->gopLength;
1388 
1389  if (IS_CBR(cc->rcParams.rateControlMode)) {
1390  /* Older SDKs use outputBufferingPeriodSEI to control filler data */
1391  hevc->outputBufferingPeriodSEI = ctx->cbr_padding;
1392 
1393  hevc->enableFillerDataInsertion = ctx->cbr_padding;
1394  }
1395 
1396  hevc->outputPictureTimingSEI = 1;
1397 
1398 #ifdef NVENC_HAVE_MVHEVC
1399  if (ctx->multiview_supported && (ctx->profile == NV_ENC_HEVC_PROFILE_MAIN || ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN)) {
1400  const AVFrameSideData *sd_stereo3d = av_frame_side_data_get(avctx->decoded_side_data, avctx->nb_decoded_side_data, AV_FRAME_DATA_STEREO3D);
1401  const AVFrameSideData *sd_tdrdi = av_frame_side_data_get(avctx->decoded_side_data, avctx->nb_decoded_side_data, AV_FRAME_DATA_3D_REFERENCE_DISPLAYS);
1402  const AVStereo3D *stereo3d = sd_stereo3d ? (const AVStereo3D*)sd_stereo3d->data : NULL;
1403 
1404  if (sd_tdrdi && stereo3d && stereo3d->type == AV_STEREO3D_FRAMESEQUENCE)
1405  ctx->profile = NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN;
1406 
1407  if (ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN && stereo3d &&
1408  stereo3d->type != AV_STEREO3D_2D &&
1409  stereo3d->type != AV_STEREO3D_UNSPEC &&
1410  stereo3d->type != AV_STEREO3D_FRAMESEQUENCE)
1411  {
1412  av_log(avctx, AV_LOG_WARNING, "Unsupported multiview input, disabling multiview encoding.\n");
1413  ctx->profile = NV_ENC_HEVC_PROFILE_MAIN;
1414  }
1415  }
1416 #endif
1417 
1418  switch (ctx->profile) {
1419  case NV_ENC_HEVC_PROFILE_MAIN:
1420  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1421  avctx->profile = AV_PROFILE_HEVC_MAIN;
1422  break;
1423  case NV_ENC_HEVC_PROFILE_MAIN_10:
1424  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1425  avctx->profile = AV_PROFILE_HEVC_MAIN_10;
1426  break;
1427  case NV_ENC_HEVC_PROFILE_REXT:
1428  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1429  avctx->profile = AV_PROFILE_HEVC_REXT;
1430  break;
1431 #ifdef NVENC_HAVE_MVHEVC
1432  case NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN:
1433  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1434  avctx->profile = AV_PROFILE_HEVC_MULTIVIEW_MAIN;
1435  ctx->multiview = 1;
1436 
1437  hevc->enableMVHEVC = 1;
1438  hevc->outputHevc3DReferenceDisplayInfo = 1;
1439 
1440  av_log(avctx, AV_LOG_VERBOSE, "Enabling MV HEVC encoding.\n");
1441  break;
1442 #endif
1443  }
1444 
1445  // force setting profile as main10 if input is 10 bit or if it should be encoded as 10 bit
1446  if (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) {
1447  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1448  avctx->profile = AV_PROFILE_HEVC_MAIN_10;
1449  }
1450 
1451  // force setting profile as rext if input is yuv444 or yuv422
1452  if (IS_YUV444(ctx->data_pix_fmt) || IS_YUV422(ctx->data_pix_fmt)) {
1453  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1454  avctx->profile = AV_PROFILE_HEVC_REXT;
1455  }
1456 
1457 #ifdef NVENC_HAVE_MVHEVC
1458  if (ctx->multiview && avctx->profile != AV_PROFILE_HEVC_MULTIVIEW_MAIN) {
1459  av_log(avctx, AV_LOG_ERROR, "Multiview encoding only works for Main profile content.\n");
1460  return AVERROR(EINVAL);
1461  }
1462 #endif
1463 
1464  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : IS_YUV422(ctx->data_pix_fmt) ? 2 : 1;
1465 
1466 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1467  hevc->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1468  hevc->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1469 #else
1470  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1471 #endif
1472 
1473  hevc->level = ctx->level;
1474 
1475  hevc->tier = ctx->tier;
1476 
1477  if (ctx->b_ref_mode >= 0)
1478  hevc->useBFramesAsRef = ctx->b_ref_mode;
1479 
1480  hevc->numRefL0 = avctx->refs;
1481  hevc->numRefL1 = avctx->refs;
1482 
1483 #ifdef NVENC_HAVE_TEMPORAL_FILTER
1484  if (ctx->tf_level >= 0) {
1485  hevc->tfLevel = ctx->tf_level;
1486 
1487  switch (ctx->tf_level)
1488  {
1489  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1490  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1491  break;
1492  default:
1493  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1494  return AVERROR(EINVAL);
1495  }
1496 
1497  if (ctx->encode_config.frameIntervalP < 5)
1498  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1499  }
1500 #endif
1501 
1502  return 0;
1503 }
1504 
1505 #if CONFIG_AV1_NVENC_ENCODER
1506 static av_cold int nvenc_setup_av1_config(AVCodecContext *avctx)
1507 {
1508  NvencContext *ctx = avctx->priv_data;
1509  NV_ENC_CONFIG *cc = &ctx->encode_config;
1510  NV_ENC_CONFIG_AV1 *av1 = &cc->encodeCodecConfig.av1Config;
1511 
1512  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1513 
1514  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1515  av1->matrixCoefficients = to_nv_color_matrix(AVCOL_SPC_BT470BG);
1516  av1->colorPrimaries = to_nv_color_pri(avctx->color_primaries);
1517  av1->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1518  av1->colorRange = 0;
1519  } else {
1520  av1->matrixCoefficients = to_nv_color_matrix(IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace);
1521  av1->colorPrimaries = to_nv_color_pri(avctx->color_primaries);
1522  av1->transferCharacteristics = to_nv_color_trc(avctx->color_trc);
1523  av1->colorRange = (avctx->color_range == AVCOL_RANGE_JPEG
1524  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1525  }
1526 
1527  if (IS_YUV444(ctx->data_pix_fmt)) {
1528  av_log(avctx, AV_LOG_ERROR, "AV1 High Profile not supported, required for 4:4:4 encoding\n");
1529  return AVERROR(ENOTSUP);
1530  } else {
1531  cc->profileGUID = NV_ENC_AV1_PROFILE_MAIN_GUID;
1532  avctx->profile = AV_PROFILE_AV1_MAIN;
1533  }
1534 
1535  if (ctx->dpb_size >= 0) {
1536  /* 0 means "let the hardware decide" */
1537  av1->maxNumRefFramesInDPB = ctx->dpb_size;
1538  }
1539 
1540  if (ctx->intra_refresh) {
1541  av1->enableIntraRefresh = 1;
1542  av1->intraRefreshPeriod = cc->gopLength;
1543  av1->intraRefreshCnt = cc->gopLength - 1;
1544  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1545  }
1546 
1547  av1->idrPeriod = cc->gopLength;
1548 
1549  if (IS_CBR(cc->rcParams.rateControlMode)) {
1550  av1->enableBitstreamPadding = ctx->cbr_padding;
1551  }
1552 
1553  if (ctx->tile_cols >= 0)
1554  av1->numTileColumns = ctx->tile_cols;
1555  if (ctx->tile_rows >= 0)
1556  av1->numTileRows = ctx->tile_rows;
1557 
1558  av1->outputAnnexBFormat = 0;
1559 
1560  av1->level = ctx->level;
1561  av1->tier = ctx->tier;
1562 
1563  av1->enableTimingInfo = ctx->timing_info;
1564 
1565  /* mp4 encapsulation requires sequence headers to be present on all keyframes for AV1 */
1566  av1->disableSeqHdr = 0;
1567  av1->repeatSeqHdr = 1;
1568 
1569  av1->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1570 
1571 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1572  av1->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1573  av1->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1574 #else
1575  av1->inputPixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1576  av1->pixelBitDepthMinus8 = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? 2 : 0;
1577 #endif
1578 
1579 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
1580  ctx->mdm = av1->outputMasteringDisplay = !!av_frame_side_data_get(avctx->decoded_side_data,
1581  avctx->nb_decoded_side_data,
1582  AV_FRAME_DATA_MASTERING_DISPLAY_METADATA);
1583  ctx->cll = av1->outputMaxCll = !!av_frame_side_data_get(avctx->decoded_side_data,
1584  avctx->nb_decoded_side_data,
1585  AV_FRAME_DATA_CONTENT_LIGHT_LEVEL);
1586 #endif
1587 
1588  if (ctx->b_ref_mode >= 0)
1589  av1->useBFramesAsRef = ctx->b_ref_mode;
1590 
1591  av1->numFwdRefs = avctx->refs;
1592  av1->numBwdRefs = avctx->refs;
1593 
1594 #ifdef NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER
1595  if (ctx->tf_level >= 0) {
1596  av1->tfLevel = ctx->tf_level;
1597 
1598  switch (ctx->tf_level)
1599  {
1600  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1601  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1602  break;
1603  default:
1604  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1605  return AVERROR(EINVAL);
1606  }
1607 
1608  if (ctx->encode_config.frameIntervalP < 5)
1609  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1610  }
1611 #endif
1612 
1613  return 0;
1614 }
1615 #endif
1616 
1617 static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
1618 {
1619  switch (avctx->codec->id) {
1620  case AV_CODEC_ID_H264:
1621  return nvenc_setup_h264_config(avctx);
1622  case AV_CODEC_ID_HEVC:
1623  return nvenc_setup_hevc_config(avctx);
1624 #if CONFIG_AV1_NVENC_ENCODER
1625  case AV_CODEC_ID_AV1:
1626  return nvenc_setup_av1_config(avctx);
1627 #endif
1628  /* Earlier switch/case will return if unknown codec is passed. */
1629  }
1630 
1631  return 0;
1632 }
1633 
1634 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1635  int sw, sh;
1636 
1637  sw = avctx->width;
1638  sh = avctx->height;
1639 
1640 #if CONFIG_AV1_NVENC_ENCODER
1641  if (avctx->codec->id == AV_CODEC_ID_AV1) {
1642  /* For AV1 we actually need to calculate the render width/height, not the dar */
1643  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0
1644  && avctx->sample_aspect_ratio.num != avctx->sample_aspect_ratio.den)
1645  {
1646  if (avctx->sample_aspect_ratio.num > avctx->sample_aspect_ratio.den) {
1647  sw = av_rescale(sw, avctx->sample_aspect_ratio.num, avctx->sample_aspect_ratio.den);
1648  } else {
1649  sh = av_rescale(sh, avctx->sample_aspect_ratio.den, avctx->sample_aspect_ratio.num);
1650  }
1651  }
1652 
1653  *dw = sw;
1654  *dh = sh;
1655  return;
1656  }
1657 #endif
1658 
1659  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1660  sw *= avctx->sample_aspect_ratio.num;
1661  sh *= avctx->sample_aspect_ratio.den;
1662  }
1663 
1664  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1665 }
1666 
1667 static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
1668 {
1669  NvencContext *ctx = avctx->priv_data;
1670  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1671  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1672 
1673  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1674  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1675  AVCPBProperties *cpb_props;
1676  int res = 0;
1677  int dw, dh;
1678 
1679  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1680  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1681 
1682  ctx->init_encode_params.encodeHeight = avctx->height;
1683  ctx->init_encode_params.encodeWidth = avctx->width;
1684 
1685  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1686 
1687  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1688  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1689 
1690  ctx->init_encode_params.tuningInfo = ctx->tuning_info;
1691 
1692  if (ctx->flags & NVENC_LOSSLESS)
1693  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOSSLESS;
1694  else if (ctx->flags & NVENC_LOWLATENCY)
1695  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOW_LATENCY;
1696 
1697  nv_status = p_nvenc->nvEncGetEncodePresetConfigEx(ctx->nvencoder,
1698  ctx->init_encode_params.encodeGUID,
1699  ctx->init_encode_params.presetGUID,
1700  ctx->init_encode_params.tuningInfo,
1701  &preset_config);
1702  if (nv_status != NV_ENC_SUCCESS)
1703  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1704 
1705  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1706 
1707  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1708 
1709  compute_dar(avctx, &dw, &dh);
1710  ctx->init_encode_params.darHeight = dh;
1711  ctx->init_encode_params.darWidth = dw;
1712 
1713  if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1714  ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1715  ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1716  } else {
1717  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1718  ctx->init_encode_params.frameRateDen = avctx->time_base.num;
1719  }
1720 
1721 #ifdef NVENC_HAVE_UNIDIR_B
1722  ctx->init_encode_params.enableUniDirectionalB = ctx->unidir_b;
1723 #endif
1724 
1725  ctx->init_encode_params.enableEncodeAsync = 0;
1726  ctx->init_encode_params.enablePTD = 1;
1727 
1728  /* If lookahead isn't set from CLI, use value from preset.
1729  * P6 & P7 presets may enable lookahead for better quality.
1730  * */
1731  if (ctx->rc_lookahead == 0 && ctx->encode_config.rcParams.enableLookahead)
1732  ctx->rc_lookahead = ctx->encode_config.rcParams.lookaheadDepth;
1733 
1734  if (ctx->weighted_pred == 1)
1735  ctx->init_encode_params.enableWeightedPrediction = 1;
1736 
1737 #ifdef NVENC_HAVE_SPLIT_FRAME_ENCODING
1738  ctx->init_encode_params.splitEncodeMode = ctx->split_encode_mode;
1739 
1740  if (ctx->split_encode_mode != NV_ENC_SPLIT_DISABLE_MODE) {
1741  if (avctx->codec->id == AV_CODEC_ID_HEVC && ctx->weighted_pred == 1)
1742  av_log(avctx, AV_LOG_WARNING, "Split encoding not supported with weighted prediction enabled.\n");
1743  }
1744 #endif
1745 
1746  if (ctx->bluray_compat) {
1747  ctx->aud = 1;
1748  ctx->dpb_size = FFMIN(FFMAX(avctx->refs, 0), 6);
1749  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1750  switch (avctx->codec->id) {
1751  case AV_CODEC_ID_H264:
1752  /* maximum level depends on used resolution */
1753  break;
1754  case AV_CODEC_ID_HEVC:
1755  ctx->level = NV_ENC_LEVEL_HEVC_51;
1756  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1757  break;
1758  }
1759  }
1760 
1761  if (avctx->gop_size > 0) {
1762  // only overwrite preset if a GOP size was selected as input
1763  ctx->encode_config.gopLength = avctx->gop_size;
1764  } else if (avctx->gop_size == 0) {
1765  ctx->encode_config.frameIntervalP = 0;
1766  ctx->encode_config.gopLength = 1;
1767  }
1768 
1769  if (avctx->max_b_frames >= 0 && ctx->encode_config.gopLength > 1) {
1770  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1771  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1772  }
1773 
1774  /* force to enable intra refresh */
1775  if(ctx->single_slice_intra_refresh)
1776  ctx->intra_refresh = 1;
1777 
1778  nvenc_recalc_surfaces(avctx);
1779 
1780  res = nvenc_setup_rate_control(avctx);
1781  if (res < 0)
1782  return res;
1783 
1784  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1785  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1786  } else {
1787  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1788  }
1789 
1790  res = nvenc_setup_codec_config(avctx);
1791  if (res)
1792  return res;
1793 
1794  res = nvenc_push_context(avctx);
1795  if (res < 0)
1796  return res;
1797 
1798  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1799  if (nv_status != NV_ENC_SUCCESS) {
1800  nvenc_pop_context(avctx);
1801  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1802  }
1803 
1804  if (ctx->cu_context) {
1805  nv_status = p_nvenc->nvEncSetIOCudaStreams(ctx->nvencoder, &ctx->cu_stream, &ctx->cu_stream);
1806  if (nv_status != NV_ENC_SUCCESS) {
1807  nvenc_pop_context(avctx);
1808  return nvenc_print_error(avctx, nv_status, "SetIOCudaStreams failed");
1809  }
1810  }
1811 
1812  res = nvenc_pop_context(avctx);
1813  if (res < 0)
1814  return res;
1815 
1816  if (ctx->encode_config.frameIntervalP > 1)
1817  avctx->has_b_frames = 2;
1818 
1819  if (ctx->encode_config.rcParams.averageBitRate > 0)
1820  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1821 
1822  cpb_props = ff_encode_add_cpb_side_data(avctx);
1823  if (!cpb_props)
1824  return AVERROR(ENOMEM);
1825  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1826  cpb_props->avg_bitrate = avctx->bit_rate;
1827  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1828 
1829  return 0;
1830 }
1831 
1832 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1833 {
1834  switch (pix_fmt) {
1835  case AV_PIX_FMT_YUV420P:
1836  return NV_ENC_BUFFER_FORMAT_YV12;
1837  case AV_PIX_FMT_NV12:
1838  return NV_ENC_BUFFER_FORMAT_NV12;
1839  case AV_PIX_FMT_P010:
1840  case AV_PIX_FMT_P012:
1841  case AV_PIX_FMT_P016:
1842  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
1843  case AV_PIX_FMT_GBRP:
1844  case AV_PIX_FMT_YUV444P:
1845  return NV_ENC_BUFFER_FORMAT_YUV444;
1846  case AV_PIX_FMT_GBRP16:
1847  case AV_PIX_FMT_GBRP10MSB:
1848  case AV_PIX_FMT_YUV444P16:
1849  case AV_PIX_FMT_YUV444P10MSB:
1850  case AV_PIX_FMT_YUV444P12MSB:
1851  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
1852  case AV_PIX_FMT_0RGB32:
1853  case AV_PIX_FMT_RGB32:
1854  return NV_ENC_BUFFER_FORMAT_ARGB;
1855  case AV_PIX_FMT_0BGR32:
1856  case AV_PIX_FMT_BGR32:
1857  return NV_ENC_BUFFER_FORMAT_ABGR;
1858  case AV_PIX_FMT_X2RGB10:
1859  return NV_ENC_BUFFER_FORMAT_ARGB10;
1860  case AV_PIX_FMT_X2BGR10:
1861  return NV_ENC_BUFFER_FORMAT_ABGR10;
1862 #ifdef NVENC_HAVE_422_SUPPORT
1863  case AV_PIX_FMT_NV16:
1864  return NV_ENC_BUFFER_FORMAT_NV16;
1865  case AV_PIX_FMT_P210:
1866  case AV_PIX_FMT_P212:
1867  case AV_PIX_FMT_P216:
1868  return NV_ENC_BUFFER_FORMAT_P210;
1869 #endif
1870  default:
1871  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
1872  }
1873 }
1874 
1875 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
1876 {
1877  NvencContext *ctx = avctx->priv_data;
1878  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1879  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1880  NvencSurface* tmp_surface = &ctx->surfaces[idx];
1881 
1882  NVENCSTATUS nv_status;
1883  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
1884  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
1885 
1886  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
1887  ctx->surfaces[idx].in_ref = av_frame_alloc();
1888  if (!ctx->surfaces[idx].in_ref)
1889  return AVERROR(ENOMEM);
1890  } else {
1891  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
1892 
1893  ctx->surfaces[idx].format = nvenc_map_buffer_format(ctx->data_pix_fmt);
1894  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
1895  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
1896  av_get_pix_fmt_name(ctx->data_pix_fmt));
1897  return AVERROR(EINVAL);
1898  }
1899 
1900  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
1901  allocSurf.width = avctx->width;
1902  allocSurf.height = avctx->height;
1903  allocSurf.bufferFmt = ctx->surfaces[idx].format;
1904 
1905  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
1906  if (nv_status != NV_ENC_SUCCESS) {
1907  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
1908  }
1909 
1910  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
1911  ctx->surfaces[idx].width = allocSurf.width;
1912  ctx->surfaces[idx].height = allocSurf.height;
1913  }
1914 
1915  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
1916  if (nv_status != NV_ENC_SUCCESS) {
1917  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
1918  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
1919  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
1920  av_frame_free(&ctx->surfaces[idx].in_ref);
1921  return err;
1922  }
1923 
1924  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
1925 
1926  av_fifo_write(ctx->unused_surface_queue, &tmp_surface, 1);
1927 
1928  return 0;
1929 }
1930 
1931 static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
1932 {
1933  NvencContext *ctx = avctx->priv_data;
1934  int i, res = 0, res2;
1935 
1936  ctx->surfaces = av_calloc(ctx->nb_surfaces, sizeof(*ctx->surfaces));
1937  if (!ctx->surfaces)
1938  return AVERROR(ENOMEM);
1939 
1940  ctx->frame_data_array = av_calloc(ctx->frame_data_array_nb, sizeof(*ctx->frame_data_array));
1941  if (!ctx->frame_data_array)
1942  return AVERROR(ENOMEM);
1943 
1944  ctx->timestamp_list = av_fifo_alloc2(ctx->nb_surfaces + ctx->encode_config.frameIntervalP,
1945  sizeof(int64_t), 0);
1946  if (!ctx->timestamp_list)
1947  return AVERROR(ENOMEM);
1948 
1949  ctx->unused_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1950  if (!ctx->unused_surface_queue)
1951  return AVERROR(ENOMEM);
1952 
1953  ctx->output_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1954  if (!ctx->output_surface_queue)
1955  return AVERROR(ENOMEM);
1956  ctx->output_surface_ready_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
1957  if (!ctx->output_surface_ready_queue)
1958  return AVERROR(ENOMEM);
1959 
1960  res = nvenc_push_context(avctx);
1961  if (res < 0)
1962  return res;
1963 
1964  for (i = 0; i < ctx->nb_surfaces; i++) {
1965  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
1966  goto fail;
1967  }
1968 
1969 fail:
1970  res2 = nvenc_pop_context(avctx);
1971  if (res2 < 0)
1972  return res2;
1973 
1974  return res;
1975 }
1976 
1977 static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
1978 {
1979  NvencContext *ctx = avctx->priv_data;
1980  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1981  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1982 
1983  NVENCSTATUS nv_status;
1984  uint32_t outSize = 0;
1985  char tmpHeader[NV_MAX_SEQ_HDR_LEN];
1986 
1987  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
1988  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
1989 
1990  payload.spsppsBuffer = tmpHeader;
1991  payload.inBufferSize = sizeof(tmpHeader);
1992  payload.outSPSPPSPayloadSize = &outSize;
1993 
1994  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
1995  if (nv_status != NV_ENC_SUCCESS) {
1996  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
1997  }
1998 
1999  avctx->extradata_size = outSize;
2000  avctx->extradata = av_mallocz(outSize + AV_INPUT_BUFFER_PADDING_SIZE);
2001 
2002  if (!avctx->extradata) {
2003  return AVERROR(ENOMEM);
2004  }
2005 
2006  memcpy(avctx->extradata, tmpHeader, outSize);
2007 
2008  return 0;
2009 }
2010 
2011 av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
2012 {
2013  NvencContext *ctx = avctx->priv_data;
2014  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2015  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2016  int i, res;
2017 
2018  /* the encoder has to be flushed before it can be closed */
2019  if (ctx->nvencoder) {
2020  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
2021  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
2022 
2023  res = nvenc_push_context(avctx);
2024  if (res < 0)
2025  return res;
2026 
2027  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
2028  }
2029 
2030  av_fifo_freep2(&ctx->timestamp_list);
2031  av_fifo_freep2(&ctx->output_surface_ready_queue);
2032  av_fifo_freep2(&ctx->output_surface_queue);
2033  av_fifo_freep2(&ctx->unused_surface_queue);
2034 
2035  if (ctx->frame_data_array) {
2036  for (i = 0; i < ctx->frame_data_array_nb; i++)
2037  av_buffer_unref(&ctx->frame_data_array[i].frame_opaque_ref);
2038  av_freep(&ctx->frame_data_array);
2039  }
2040 
2041  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
2042  for (i = 0; i < ctx->nb_registered_frames; i++) {
2043  if (ctx->registered_frames[i].mapped)
2044  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
2045  if (ctx->registered_frames[i].regptr)
2046  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2047  }
2048  ctx->nb_registered_frames = 0;
2049  }
2050 
2051  if (ctx->surfaces) {
2052  for (i = 0; i < ctx->nb_surfaces; ++i) {
2053  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
2054  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
2055  av_frame_free(&ctx->surfaces[i].in_ref);
2056  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
2057  }
2058  }
2059  av_freep(&ctx->surfaces);
2060  ctx->nb_surfaces = 0;
2061 
2062  av_frame_free(&ctx->frame);
2063 
2064  av_freep(&ctx->sei_data);
2065 
2066  if (ctx->nvencoder) {
2067  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
2068 
2069  res = nvenc_pop_context(avctx);
2070  if (res < 0)
2071  return res;
2072  }
2073  ctx->nvencoder = NULL;
2074 
2075  if (ctx->cu_context_internal)
2076  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
2077  ctx->cu_context = ctx->cu_context_internal = NULL;
2078 
2079 #if CONFIG_D3D11VA
2080  if (ctx->d3d11_device) {
2081  ID3D11Device_Release(ctx->d3d11_device);
2082  ctx->d3d11_device = NULL;
2083  }
2084 #endif
2085 
2086  nvenc_free_functions(&dl_fn->nvenc_dl);
2087  cuda_free_functions(&dl_fn->cuda_dl);
2088 
2089  dl_fn->nvenc_device_count = 0;
2090 
2091  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
2092 
2093  return 0;
2094 }
2095 
2096 av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
2097 {
2098  NvencContext *ctx = avctx->priv_data;
2099  int ret;
2100 
2101  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2102  AVHWFramesContext *frames_ctx;
2103  if (!avctx->hw_frames_ctx) {
2104  av_log(avctx, AV_LOG_ERROR,
2105  "hw_frames_ctx must be set when using GPU frames as input\n");
2106  return AVERROR(EINVAL);
2107  }
2108  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
2109  if (frames_ctx->format != avctx->pix_fmt) {
2110  av_log(avctx, AV_LOG_ERROR,
2111  "hw_frames_ctx must match the GPU frame type\n");
2112  return AVERROR(EINVAL);
2113  }
2114  ctx->data_pix_fmt = frames_ctx->sw_format;
2115  } else {
2116  ctx->data_pix_fmt = avctx->pix_fmt;
2117  }
2118 
2119  if (ctx->rgb_mode == NVENC_RGB_MODE_DISABLED && IS_RGB(ctx->data_pix_fmt)) {
2120  av_log(avctx, AV_LOG_ERROR, "Packed RGB input, but RGB support is disabled.\n");
2121  return AVERROR(EINVAL);
2122  }
2123 
2124  ctx->frame = av_frame_alloc();
2125  if (!ctx->frame)
2126  return AVERROR(ENOMEM);
2127 
2128  if ((ret = nvenc_load_libraries(avctx)) < 0)
2129  return ret;
2130 
2131  if ((ret = nvenc_setup_device(avctx)) < 0)
2132  return ret;
2133 
2134  if ((ret = nvenc_setup_encoder(avctx)) < 0)
2135  return ret;
2136 
2137  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
2138  return ret;
2139 
2140  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
2141  if ((ret = nvenc_setup_extradata(avctx)) < 0)
2142  return ret;
2143  }
2144 
2145  return 0;
2146 }
2147 
2148 static NvencSurface *get_free_frame(NvencContext *ctx)
2149 {
2150  NvencSurface *tmp_surf;
2151 
2152  if (av_fifo_read(ctx->unused_surface_queue, &tmp_surf, 1) < 0)
2153  // queue empty
2154  return NULL;
2155 
2156  return tmp_surf;
2157 }
2158 
2159 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
2160  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
2161 {
2162  int dst_linesize[4] = {
2163  lock_buffer_params->pitch,
2164  lock_buffer_params->pitch,
2165  lock_buffer_params->pitch,
2166  lock_buffer_params->pitch
2167  };
2168  uint8_t *dst_data[4];
2169  int ret;
2170 
2171  if (frame->format == AV_PIX_FMT_YUV420P)
2172  dst_linesize[1] = dst_linesize[2] >>= 1;
2173 
2174  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
2175  lock_buffer_params->bufferDataPtr, dst_linesize);
2176  if (ret < 0)
2177  return ret;
2178 
2179  if (frame->format == AV_PIX_FMT_YUV420P)
2180  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
2181 
2182  av_image_copy2(dst_data, dst_linesize,
2183  frame->data, frame->linesize, frame->format,
2184  avctx->width, avctx->height);
2185 
2186  return 0;
2187 }
2188 
2189 static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
2190 {
2191  NvencContext *ctx = avctx->priv_data;
2192  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2193  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2194  NVENCSTATUS nv_status;
2195 
2196  int i, first_round;
2197 
2198  if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
2199  for (first_round = 1; first_round >= 0; first_round--) {
2200  for (i = 0; i < ctx->nb_registered_frames; i++) {
2201  if (!ctx->registered_frames[i].mapped) {
2202  if (ctx->registered_frames[i].regptr) {
2203  if (first_round)
2204  continue;
2205  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2206  if (nv_status != NV_ENC_SUCCESS)
2207  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
2208  ctx->registered_frames[i].ptr = NULL;
2209  ctx->registered_frames[i].regptr = NULL;
2210  }
2211  return i;
2212  }
2213  }
2214  }
2215  } else {
2216  return ctx->nb_registered_frames++;
2217  }
2218 
2219  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
2220  return AVERROR(ENOMEM);
2221 }
2222 
2223 static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
2224 {
2225  NvencContext *ctx = avctx->priv_data;
2226  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2227  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2228 
2229  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
2230  NV_ENC_REGISTER_RESOURCE reg = { 0 };
2231  int i, idx, ret;
2232 
2233  for (i = 0; i < ctx->nb_registered_frames; i++) {
2234  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
2235  return i;
2236  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
2237  return i;
2238  }
2239 
2240  idx = nvenc_find_free_reg_resource(avctx);
2241  if (idx < 0)
2242  return idx;
2243 
2244  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
2245  reg.width = frames_ctx->width;
2246  reg.height = frames_ctx->height;
2247  reg.pitch = frame->linesize[0];
2248  reg.resourceToRegister = frame->data[0];
2249 
2250  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
2251  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
2252  }
2253  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2254  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
2255  reg.subResourceIndex = (intptr_t)frame->data[1];
2256  }
2257 
2258  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
2259  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
2260  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
2261  av_get_pix_fmt_name(frames_ctx->sw_format));
2262  return AVERROR(EINVAL);
2263  }
2264 
2265  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
2266  if (ret != NV_ENC_SUCCESS) {
2267  nvenc_print_error(avctx, ret, "Error registering an input resource");
2268  return AVERROR_UNKNOWN;
2269  }
2270 
2271  ctx->registered_frames[idx].ptr = frame->data[0];
2272  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
2273  ctx->registered_frames[idx].regptr = reg.registeredResource;
2274  return idx;
2275 }
2276 
2277 static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame,
2278  NvencSurface *nvenc_frame)
2279 {
2280  NvencContext *ctx = avctx->priv_data;
2281  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2282  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2283 
2284  int res;
2285  NVENCSTATUS nv_status;
2286 
2287  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2288  int reg_idx = nvenc_register_frame(avctx, frame);
2289  if (reg_idx < 0) {
2290  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
2291  return reg_idx;
2292  }
2293 
2294  res = av_frame_ref(nvenc_frame->in_ref, frame);
2295  if (res < 0)
2296  return res;
2297 
2298  if (!ctx->registered_frames[reg_idx].mapped) {
2299  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
2300  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
2301  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
2302  if (nv_status != NV_ENC_SUCCESS) {
2303  av_frame_unref(nvenc_frame->in_ref);
2304  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
2305  }
2306  }
2307 
2308  ctx->registered_frames[reg_idx].mapped += 1;
2309 
2310  nvenc_frame->reg_idx = reg_idx;
2311  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
2312  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
2313  nvenc_frame->pitch = frame->linesize[0];
2314 
2315  return 0;
2316  } else {
2317  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
2318 
2319  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
2320  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
2321 
2322  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
2323  if (nv_status != NV_ENC_SUCCESS) {
2324  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
2325  }
2326 
2327  nvenc_frame->pitch = lockBufferParams.pitch;
2328  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
2329 
2330  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
2331  if (nv_status != NV_ENC_SUCCESS) {
2332  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
2333  }
2334 
2335  return res;
2336  }
2337 }
2338 
2339 #ifdef NVENC_HAVE_TIME_CODE
2340 static void nvenc_fill_time_code(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_TIME_CODE *time_code)
2341 {
2342  AVFrameSideData *sd = av_frame_get_side_data(frame, AV_FRAME_DATA_S12M_TIMECODE);
2343 
2344  if (sd) {
2345  uint32_t *tc = (uint32_t*)sd->data;
2346  int cnt = FFMIN(tc[0], FF_ARRAY_ELEMS(time_code->clockTimestamp));
2347 
2348  switch (cnt) {
2349  case 0:
2350  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2351  time_code->skipClockTimestampInsertion = 1;
2352  break;
2353  case 2:
2354  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME_DOUBLING;
2355  break;
2356  case 3:
2357  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME_TRIPLING;
2358  break;
2359  default:
2360  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2361  break;
2362  }
2363 
2364  for (int i = 0; i < cnt; i++) {
2365  unsigned hh, mm, ss, ff, drop;
2366  ff_timecode_set_smpte(&drop, &hh, &mm, &ss, &ff, avctx->framerate, tc[i + 1], 0, 0);
2367 
2368 #ifdef NVENC_NEW_COUNTING_TYPE
2369  time_code->clockTimestamp[i].countingTypeLSB = 0;
2370  time_code->clockTimestamp[i].countingTypeMSB = 0;
2371 #else
2372  time_code->clockTimestamp[i].countingType = 0;
2373 #endif
2374  time_code->clockTimestamp[i].discontinuityFlag = 0;
2375  time_code->clockTimestamp[i].cntDroppedFrames = drop;
2376  time_code->clockTimestamp[i].nFrames = ff;
2377  time_code->clockTimestamp[i].secondsValue = ss;
2378  time_code->clockTimestamp[i].minutesValue = mm;
2379  time_code->clockTimestamp[i].hoursValue = hh;
2380  time_code->clockTimestamp[i].timeOffset = 0;
2381  }
2382  } else {
2383  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2384  time_code->skipClockTimestampInsertion = 1;
2385  }
2386 }
2387 #endif
2388 
2389 static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, const AVFrame *frame,
2390  NV_ENC_PIC_PARAMS *params,
2391  NV_ENC_SEI_PAYLOAD *sei_data,
2392  int sei_count)
2393 {
2394  NvencContext *ctx = avctx->priv_data;
2395 
2396  switch (avctx->codec->id) {
2397  case AV_CODEC_ID_H264:
2398  params->codecPicParams.h264PicParams.sliceMode =
2399  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
2400  params->codecPicParams.h264PicParams.sliceModeData =
2401  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
2402  if (sei_count > 0) {
2403  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
2404  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = sei_count;
2405  }
2406 
2407 #ifdef NVENC_HAVE_TIME_CODE
2408  if (ctx->s12m_tc)
2409  nvenc_fill_time_code(avctx, frame, &params->codecPicParams.h264PicParams.timeCode);
2410 #endif
2411 
2412  break;
2413  case AV_CODEC_ID_HEVC:
2414  params->codecPicParams.hevcPicParams.sliceMode =
2415  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
2416  params->codecPicParams.hevcPicParams.sliceModeData =
2417  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
2418  if (sei_count > 0) {
2419  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
2420  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = sei_count;
2421  }
2422 
2423  break;
2424 #if CONFIG_AV1_NVENC_ENCODER
2425  case AV_CODEC_ID_AV1:
2426  params->codecPicParams.av1PicParams.numTileColumns =
2427  ctx->encode_config.encodeCodecConfig.av1Config.numTileColumns;
2428  params->codecPicParams.av1PicParams.numTileRows =
2429  ctx->encode_config.encodeCodecConfig.av1Config.numTileRows;
2430  if (sei_count > 0) {
2431  params->codecPicParams.av1PicParams.obuPayloadArray = sei_data;
2432  params->codecPicParams.av1PicParams.obuPayloadArrayCnt = sei_count;
2433  }
2434 
2435  break;
2436 #endif
2437  }
2438 }
2439 
2440 static inline void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
2441 {
2442  av_fifo_write(queue, &timestamp, 1);
2443 }
2444 
2445 static inline int64_t timestamp_queue_dequeue(AVFifo *queue)
2446 {
2447  int64_t timestamp = AV_NOPTS_VALUE;
2448  // The following call might fail if the queue is empty.
2449  av_fifo_read(queue, &timestamp, 1);
2450 
2451  return timestamp;
2452 }
2453 
2454 static inline int64_t timestamp_queue_peek(AVFifo *queue, size_t index)
2455 {
2456  int64_t timestamp = AV_NOPTS_VALUE;
2457  av_fifo_peek(queue, &timestamp, 1, index);
2458 
2459  return timestamp;
2460 }
2461 
2462 static int nvenc_set_timestamp(AVCodecContext *avctx,
2463  NV_ENC_LOCK_BITSTREAM *params,
2464  AVPacket *pkt)
2465 {
2466  NvencContext *ctx = avctx->priv_data;
2467  unsigned int delay;
2468  int64_t delay_time;
2469 
2470  pkt->pts = params->outputTimeStamp;
2471 
2472  if (!(avctx->codec_descriptor->props & AV_CODEC_PROP_REORDER)) {
2473  pkt->dts = pkt->pts;
2474  return 0;
2475  }
2476 
2477  // This can be more than necessary, but we don't know the real reorder delay.
2478  delay = FFMAX(ctx->encode_config.frameIntervalP - 1, 0);
2479 #ifdef NVENC_HAVE_MVHEVC
2480  delay *= ctx->multiview ? 2 : 1;
2481 #endif
2482  if (ctx->output_frame_num >= delay) {
2483  pkt->dts = timestamp_queue_dequeue(ctx->timestamp_list);
2484  ctx->output_frame_num++;
2485  return 0;
2486  }
2487 
2488  delay_time = ctx->initial_delay_time;
2489  if (!delay_time) {
2490  int64_t t1, t2, t3;
2491  t1 = timestamp_queue_peek(ctx->timestamp_list, delay);
2492  t2 = timestamp_queue_peek(ctx->timestamp_list, 0);
2493  t3 = (delay > 1) ? timestamp_queue_peek(ctx->timestamp_list, 1) : t1;
2494 
2495  if (t1 != AV_NOPTS_VALUE) {
2496  delay_time = t1 - t2;
2497  } else if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
2498  delay_time = av_rescale_q(delay, (AVRational) {avctx->framerate.den, avctx->framerate.num},
2499  avctx->time_base);
2500  } else if (t3 != AV_NOPTS_VALUE) {
2501  delay_time = delay * (t3 - t2);
2502  } else {
2503  delay_time = delay;
2504  }
2505  ctx->initial_delay_time = delay_time;
2506  }
2507 
2508  /* The following method is simple, but doesn't guarantee monotonic with VFR
2509  * when delay_time isn't accurate (that is, t1 == AV_NOPTS_VALUE)
2510  *
2511  * dts = timestamp_queue_peek(ctx->timestamp_list, ctx->output_frame_num) - delay_time
2512  */
2513  pkt->dts = timestamp_queue_peek(ctx->timestamp_list, 0) - delay_time * (delay - ctx->output_frame_num) / delay;
2514  ctx->output_frame_num++;
2515 
2516  return 0;
2517 }
2518 
2519 static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
2520 {
2521  NvencContext *ctx = avctx->priv_data;
2522  int res = 0;
2523 
2524  int idx = ctx->frame_data_array_pos;
2525  NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2526 
2527  // in case the encoder got reconfigured, there might be leftovers
2528  av_buffer_unref(&frame_data->frame_opaque_ref);
2529 
2530  if (frame->opaque_ref && avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2531  frame_data->frame_opaque_ref = av_buffer_ref(frame->opaque_ref);
2532  if (!frame_data->frame_opaque_ref)
2533  return AVERROR(ENOMEM);
2534  }
2535 
2536  frame_data->duration = frame->duration;
2537  frame_data->frame_opaque = frame->opaque;
2538 
2539  ctx->frame_data_array_pos = (ctx->frame_data_array_pos + 1) % ctx->frame_data_array_nb;
2540  pic_params->inputDuration = idx;
2541 
2542  return res;
2543 }
2544 
2545 static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
2546 {
2547  NvencContext *ctx = avctx->priv_data;
2548  int res = 0;
2549 
2550  int idx = lock_params->outputDuration;
2551  NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2552 
2553  pkt->duration = frame_data->duration;
2554 
2555  if (avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2556  pkt->opaque = frame_data->frame_opaque;
2557  pkt->opaque_ref = frame_data->frame_opaque_ref;
2558  frame_data->frame_opaque_ref = NULL;
2559  }
2560 
2561  av_buffer_unref(&frame_data->frame_opaque_ref);
2562 
2563  return res;
2564 }
2565 
2566 static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
2567 {
2568  NvencContext *ctx = avctx->priv_data;
2569  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2570  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2571 
2572  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
2573  NVENCSTATUS nv_status;
2574  int res = 0;
2575 
2576  enum AVPictureType pict_type;
2577 
2578  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
2579 
2580  lock_params.doNotWait = 0;
2581  lock_params.outputBitstream = tmpoutsurf->output_surface;
2582 
2583  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
2584  if (nv_status != NV_ENC_SUCCESS) {
2585  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
2586  goto error;
2587  }
2588 
2589  res = ff_get_encode_buffer(avctx, pkt, lock_params.bitstreamSizeInBytes, 0);
2590 
2591  if (res < 0) {
2592  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2593  goto error;
2594  }
2595 
2596  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
2597 
2598  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2599  if (nv_status != NV_ENC_SUCCESS) {
2600  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
2601  goto error;
2602  }
2603 
2604 
2605  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2606  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
2607  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
2608  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
2609  if (nv_status != NV_ENC_SUCCESS) {
2610  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
2611  goto error;
2612  }
2613  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
2614  res = AVERROR_BUG;
2615  goto error;
2616  }
2617 
2618  av_frame_unref(tmpoutsurf->in_ref);
2619 
2620  tmpoutsurf->input_surface = NULL;
2621  }
2622 
2623  switch (lock_params.pictureType) {
2624  case NV_ENC_PIC_TYPE_IDR:
2625  pkt->flags |= AV_PKT_FLAG_KEY;
2626  av_fallthrough;
2627  case NV_ENC_PIC_TYPE_I:
2628  pict_type = AV_PICTURE_TYPE_I;
2629  break;
2630  case NV_ENC_PIC_TYPE_P:
2631  pict_type = AV_PICTURE_TYPE_P;
2632  break;
2633  case NV_ENC_PIC_TYPE_B:
2634  pict_type = AV_PICTURE_TYPE_B;
2635  break;
2636  case NV_ENC_PIC_TYPE_BI:
2637  pict_type = AV_PICTURE_TYPE_BI;
2638  break;
2639  default:
2640  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
2641  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
2642  res = AVERROR_EXTERNAL;
2643  goto error;
2644  }
2645 
2646  ff_encode_add_stats_side_data(pkt,
2647  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
2648 
2649  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
2650  if (res < 0)
2651  goto error2;
2652 
2653  res = nvenc_retrieve_frame_data(avctx, &lock_params, pkt);
2654  if (res < 0)
2655  goto error2;
2656 
2657  return 0;
2658 
2659 error:
2660  timestamp_queue_dequeue(ctx->timestamp_list);
2661 
2662 error2:
2663  return res;
2664 }
2665 
2666 static int output_ready(AVCodecContext *avctx, int flush)
2667 {
2668  NvencContext *ctx = avctx->priv_data;
2669  int nb_ready, nb_pending;
2670 
2671  nb_ready = av_fifo_can_read(ctx->output_surface_ready_queue);
2672  nb_pending = av_fifo_can_read(ctx->output_surface_queue);
2673  if (flush)
2674  return nb_ready > 0;
2675  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
2676 }
2677 
2678 static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
2679 {
2680  NvencContext *ctx = avctx->priv_data;
2681  int sei_count = 0;
2682  int i, res;
2683 
2684  if (ctx->a53_cc && av_frame_get_side_data(frame, AV_FRAME_DATA_A53_CC)) {
2685  void *a53_data = NULL;
2686  size_t a53_size = 0;
2687 
2688  if (ff_alloc_a53_sei(frame, 0, &a53_data, &a53_size) < 0) {
2689  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2690  }
2691 
2692  if (a53_data) {
2693  void *tmp = av_fast_realloc(ctx->sei_data,
2694  &ctx->sei_data_size,
2695  (sei_count + 1) * sizeof(*ctx->sei_data));
2696  if (!tmp) {
2697  av_free(a53_data);
2698  res = AVERROR(ENOMEM);
2699  goto error;
2700  } else {
2701  ctx->sei_data = tmp;
2702  ctx->sei_data[sei_count].payloadSize = (uint32_t)a53_size;
2703  ctx->sei_data[sei_count].payload = (uint8_t*)a53_data;
2704 
2705 #if CONFIG_AV1_NVENC_ENCODER
2706  if (avctx->codec->id == AV_CODEC_ID_AV1)
2707  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_ITUT_T35;
2708  else
2709 #endif
2710  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35;
2711 
2712  sei_count++;
2713  }
2714  }
2715  }
2716 
2717  if (ctx->s12m_tc && avctx->codec->id != AV_CODEC_ID_H264 && av_frame_get_side_data(frame, AV_FRAME_DATA_S12M_TIMECODE)) {
2718  void *tc_data = NULL;
2719  size_t tc_size = 0;
2720 
2721  if (ff_alloc_timecode_sei(frame, avctx->framerate, 0, &tc_data, &tc_size) < 0) {
2722  av_log(ctx, AV_LOG_ERROR, "Not enough memory for timecode sei, skipping\n");
2723  }
2724 
2725  if (tc_data) {
2726  void *tmp = av_fast_realloc(ctx->sei_data,
2727  &ctx->sei_data_size,
2728  (sei_count + 1) * sizeof(*ctx->sei_data));
2729  if (!tmp) {
2730  av_free(tc_data);
2731  res = AVERROR(ENOMEM);
2732  goto error;
2733  } else {
2734  ctx->sei_data = tmp;
2735  ctx->sei_data[sei_count].payloadSize = (uint32_t)tc_size;
2736  ctx->sei_data[sei_count].payload = (uint8_t*)tc_data;
2737 
2738 #if CONFIG_AV1_NVENC_ENCODER
2739  if (avctx->codec->id == AV_CODEC_ID_AV1)
2740  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_TIMECODE;
2741  else
2742 #endif
2743  ctx->sei_data[sei_count].payloadType = SEI_TYPE_TIME_CODE;
2744 
2745  sei_count++;
2746  }
2747  }
2748  }
2749 
2750  if (!ctx->udu_sei)
2751  return sei_count;
2752 
2753  for (i = 0; i < frame->nb_side_data; i++) {
2754  AVFrameSideData *side_data = frame->side_data[i];
2755  void *tmp;
2756 
2757  if (side_data->type != AV_FRAME_DATA_SEI_UNREGISTERED)
2758  continue;
2759 
2760  tmp = av_fast_realloc(ctx->sei_data,
2761  &ctx->sei_data_size,
2762  (sei_count + 1) * sizeof(*ctx->sei_data));
2763  if (!tmp) {
2764  res = AVERROR(ENOMEM);
2765  goto error;
2766  } else {
2767  ctx->sei_data = tmp;
2768  ctx->sei_data[sei_count].payloadSize = side_data->size;
2769  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_UNREGISTERED;
2770  ctx->sei_data[sei_count].payload = av_memdup(side_data->data, side_data->size);
2771 
2772  if (!ctx->sei_data[sei_count].payload) {
2773  res = AVERROR(ENOMEM);
2774  goto error;
2775  }
2776 
2777  sei_count++;
2778  }
2779  }
2780 
2781  return sei_count;
2782 
2783 error:
2784  for (i = 0; i < sei_count; i++)
2785  av_freep(&(ctx->sei_data[i].payload));
2786 
2787  return res;
2788 }
2789 
2790 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
2791 {
2792  NvencContext *ctx = avctx->priv_data;
2793  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
2794  NVENCSTATUS ret;
2795 
2796  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
2797  int needs_reconfig = 0;
2798  int needs_encode_config = 0;
2799  int reconfig_bitrate = 0, reconfig_dar = 0;
2800  int dw, dh;
2801 
2802  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
2803  params.reInitEncodeParams = ctx->init_encode_params;
2804 
2805  compute_dar(avctx, &dw, &dh);
2806  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
2807  av_log(avctx, AV_LOG_VERBOSE,
2808  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
2809  ctx->init_encode_params.darWidth,
2810  ctx->init_encode_params.darHeight, dw, dh);
2811 
2812  params.reInitEncodeParams.darHeight = dh;
2813  params.reInitEncodeParams.darWidth = dw;
2814 
2815  needs_reconfig = 1;
2816  reconfig_dar = 1;
2817  }
2818 
2819  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
2820  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
2821  av_log(avctx, AV_LOG_VERBOSE,
2822  "avg bitrate change: %d -> %d\n",
2823  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
2824  (uint32_t)avctx->bit_rate);
2825 
2826  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
2827  reconfig_bitrate = 1;
2828  }
2829 
2830  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
2831  av_log(avctx, AV_LOG_VERBOSE,
2832  "max bitrate change: %d -> %d\n",
2833  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
2834  (uint32_t)avctx->rc_max_rate);
2835 
2836  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
2837  reconfig_bitrate = 1;
2838  }
2839 
2840  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
2841  av_log(avctx, AV_LOG_VERBOSE,
2842  "vbv buffer size change: %d -> %d\n",
2843  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
2844  avctx->rc_buffer_size);
2845 
2846  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
2847  reconfig_bitrate = 1;
2848  }
2849 
2850  if (reconfig_bitrate) {
2851  params.resetEncoder = 1;
2852  params.forceIDR = 1;
2853 
2854  needs_encode_config = 1;
2855  needs_reconfig = 1;
2856  }
2857  }
2858 
2859  if (!needs_encode_config)
2860  params.reInitEncodeParams.encodeConfig = NULL;
2861 
2862  if (needs_reconfig) {
2863  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
2864  if (ret != NV_ENC_SUCCESS) {
2865  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
2866  } else {
2867  if (reconfig_dar) {
2868  ctx->init_encode_params.darHeight = dh;
2869  ctx->init_encode_params.darWidth = dw;
2870  }
2871 
2872  if (reconfig_bitrate) {
2873  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
2874  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
2875  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
2876  }
2877 
2878  }
2879  }
2880 }
2881 
2882 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
2883 static int nvenc_set_mastering_display_data(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_PIC_PARAMS *pic_params,
2884  MASTERING_DISPLAY_INFO *mastering_disp_info, CONTENT_LIGHT_LEVEL *content_light_level)
2885 {
2886  NvencContext *ctx = avctx->priv_data;
2887 
2888  if (ctx->mdm || ctx->cll) {
2889  const AVFrameSideData *sd_mdm = av_frame_get_side_data(frame, AV_FRAME_DATA_MASTERING_DISPLAY_METADATA);
2890  const AVFrameSideData *sd_cll = av_frame_get_side_data(frame, AV_FRAME_DATA_CONTENT_LIGHT_LEVEL);
2891  const int chroma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 16 : 50000;
2892  const int max_luma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 8 : 10000;
2893  const int min_luma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 14 : 10000;
2894 
2895  if (!sd_mdm)
2896  sd_mdm = av_frame_side_data_get(avctx->decoded_side_data,
2897  avctx->nb_decoded_side_data,
2898  AV_FRAME_DATA_MASTERING_DISPLAY_METADATA);
2899  if (!sd_cll)
2900  sd_cll = av_frame_side_data_get(avctx->decoded_side_data,
2901  avctx->nb_decoded_side_data,
2902  AV_FRAME_DATA_CONTENT_LIGHT_LEVEL);
2903 
2904  if (sd_mdm) {
2905  const AVMasteringDisplayMetadata *mdm = (AVMasteringDisplayMetadata *)sd_mdm->data;
2906 
2907  mastering_disp_info->r.x = av_rescale(mdm->display_primaries[0][0].num, chroma_den,
2908  mdm->display_primaries[0][0].den);
2909  mastering_disp_info->r.y = av_rescale(mdm->display_primaries[0][1].num, chroma_den,
2910  mdm->display_primaries[0][1].den);
2911  mastering_disp_info->g.x = av_rescale(mdm->display_primaries[1][0].num, chroma_den,
2912  mdm->display_primaries[1][0].den);
2913  mastering_disp_info->g.y = av_rescale(mdm->display_primaries[1][1].num, chroma_den,
2914  mdm->display_primaries[1][1].den);
2915  mastering_disp_info->b.x = av_rescale(mdm->display_primaries[2][0].num, chroma_den,
2916  mdm->display_primaries[2][0].den);
2917  mastering_disp_info->b.y = av_rescale(mdm->display_primaries[2][1].num, chroma_den,
2918  mdm->display_primaries[2][1].den);
2919  mastering_disp_info->whitePoint.x = av_rescale(mdm->white_point[0].num, chroma_den,
2920  mdm->white_point[0].den);
2921  mastering_disp_info->whitePoint.y = av_rescale(mdm->white_point[1].num, chroma_den,
2922  mdm->white_point[1].den);
2923  mastering_disp_info->maxLuma = av_rescale(mdm->max_luminance.num, max_luma_den,
2924  mdm->max_luminance.den);
2925  mastering_disp_info->minLuma = av_rescale(mdm->min_luminance.num, min_luma_den,
2926  mdm->min_luminance.den);
2927 
2928  if (avctx->codec->id == AV_CODEC_ID_HEVC)
2929  pic_params->codecPicParams.hevcPicParams.pMasteringDisplay = mastering_disp_info;
2930  else if (avctx->codec->id == AV_CODEC_ID_AV1)
2931  pic_params->codecPicParams.av1PicParams.pMasteringDisplay = mastering_disp_info;
2932  else
2933  return AVERROR_BUG;
2934  }
2935  if (sd_cll) {
2936  const AVContentLightMetadata *cll = (AVContentLightMetadata *)sd_cll->data;
2937 
2938  content_light_level->maxContentLightLevel = cll->MaxCLL;
2939  content_light_level->maxPicAverageLightLevel = cll->MaxFALL;
2940 
2941  if (avctx->codec->id == AV_CODEC_ID_HEVC)
2942  pic_params->codecPicParams.hevcPicParams.pMaxCll = content_light_level;
2943  else if (avctx->codec->id == AV_CODEC_ID_AV1)
2944  pic_params->codecPicParams.av1PicParams.pMaxCll = content_light_level;
2945  else
2946  return AVERROR_BUG;
2947  }
2948  }
2949 
2950  return 0;
2951 }
2952 #endif
2953 
2954 static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
2955 {
2956  NVENCSTATUS nv_status;
2957  NvencSurface *tmp_out_surf, *in_surf;
2958  int res, res2;
2959  int sei_count = 0;
2960  int i;
2961 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
2962  MASTERING_DISPLAY_INFO mastering_disp_info = { 0 };
2963  CONTENT_LIGHT_LEVEL content_light_level = { 0 };
2964 #endif
2965 #ifdef NVENC_HAVE_MVHEVC
2966  HEVC_3D_REFERENCE_DISPLAY_INFO ref_disp_info = { 0 };
2967 #endif
2968 
2969  NvencContext *ctx = avctx->priv_data;
2970  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2971  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2972 
2973  NV_ENC_PIC_PARAMS pic_params = { 0 };
2974  pic_params.version = NV_ENC_PIC_PARAMS_VER;
2975 
2976  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
2977  return AVERROR(EINVAL);
2978 
2979  if (frame && frame->buf[0]) {
2980  in_surf = get_free_frame(ctx);
2981  if (!in_surf)
2982  return AVERROR(EAGAIN);
2983 
2984  res = nvenc_push_context(avctx);
2985  if (res < 0)
2986  return res;
2987 
2988  reconfig_encoder(avctx, frame);
2989 
2990  res = nvenc_upload_frame(avctx, frame, in_surf);
2991 
2992  res2 = nvenc_pop_context(avctx);
2993  if (res2 < 0)
2994  return res2;
2995 
2996  if (res)
2997  return res;
2998 
2999  pic_params.inputBuffer = in_surf->input_surface;
3000  pic_params.bufferFmt = in_surf->format;
3001  pic_params.inputWidth = in_surf->width;
3002  pic_params.inputHeight = in_surf->height;
3003  pic_params.inputPitch = in_surf->pitch;
3004  pic_params.outputBitstream = in_surf->output_surface;
3005 
3006  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
3007  if (frame->flags & AV_FRAME_FLAG_TOP_FIELD_FIRST)
3008  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
3009  else
3010  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
3011  } else {
3012  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
3013  }
3014 
3015  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
3016  pic_params.encodePicFlags =
3017  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
3018  } else {
3019  pic_params.encodePicFlags = 0;
3020  }
3021 
3022  pic_params.frameIdx = ctx->frame_idx_counter++;
3023  pic_params.inputTimeStamp = frame->pts;
3024 
3025  if (ctx->extra_sei) {
3026  res = prepare_sei_data_array(avctx, frame);
3027  if (res < 0)
3028  return res;
3029  sei_count = res;
3030  }
3031 
3032 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3033  res = nvenc_set_mastering_display_data(avctx, frame, &pic_params, &mastering_disp_info, &content_light_level);
3034  if (res < 0)
3035  return res;
3036 #endif
3037 
3038 #ifdef NVENC_HAVE_MVHEVC
3039  if (ctx->multiview) {
3040  const AVFrameSideData *sd_tdrdi = av_frame_get_side_data(frame, AV_FRAME_DATA_3D_REFERENCE_DISPLAYS);
3041  const AVFrameSideData *sd_view_id = av_frame_get_side_data(frame, AV_FRAME_DATA_VIEW_ID);
3042 
3043  if (sd_view_id)
3044  ctx->next_view_id = *(int*)sd_view_id->data;
3045 
3046  pic_params.codecPicParams.hevcPicParams.viewId = ctx->next_view_id;
3047 
3048  if (sd_tdrdi) {
3049  AV3DReferenceDisplaysInfo *tdrdi = (AV3DReferenceDisplaysInfo*)sd_tdrdi->data;
3050 
3051  ref_disp_info.refViewingDistanceFlag = tdrdi->ref_viewing_distance_flag;
3052  ref_disp_info.precRefViewingDist = tdrdi->prec_ref_viewing_dist;
3053  ref_disp_info.precRefDisplayWidth = tdrdi->prec_ref_display_width;
3054 
3055  ref_disp_info.numRefDisplaysMinus1 = tdrdi->num_ref_displays - 1;
3056 
3057  for (i = 0; i < tdrdi->num_ref_displays &&
3058  i < FF_ARRAY_ELEMS(ref_disp_info.leftViewId); i++) {
3059  const AV3DReferenceDisplay *display = av_tdrdi_get_display(tdrdi, i);
3060  ref_disp_info.leftViewId[i] = display->left_view_id;
3061  ref_disp_info.rightViewId[i] = display->right_view_id;
3062  ref_disp_info.exponentRefDisplayWidth[i] = display->exponent_ref_display_width;
3063  ref_disp_info.mantissaRefDisplayWidth[i] = display->mantissa_ref_display_width;
3064  ref_disp_info.exponentRefViewingDistance[i] = display->exponent_ref_viewing_distance;
3065  ref_disp_info.mantissaRefViewingDistance[i] = display->mantissa_ref_viewing_distance;
3066  ref_disp_info.additionalShiftPresentFlag[i] = display->additional_shift_present_flag;
3067  ref_disp_info.numSampleShiftPlus512[i] = display->num_sample_shift + 512;
3068  }
3069 
3070  pic_params.codecPicParams.hevcPicParams.p3DReferenceDisplayInfo = &ref_disp_info;
3071  ctx->display_sei_sent = 1;
3072  } else if (!ctx->display_sei_sent) {
3073  ref_disp_info.precRefDisplayWidth = 31;
3074  ref_disp_info.leftViewId[0] = 0;
3075  ref_disp_info.rightViewId[0] = 1;
3076 
3077  pic_params.codecPicParams.hevcPicParams.p3DReferenceDisplayInfo = &ref_disp_info;
3078  ctx->display_sei_sent = 1;
3079  }
3080 
3081  ctx->next_view_id = !ctx->next_view_id;
3082  }
3083 #endif
3084 
3085  res = nvenc_store_frame_data(avctx, &pic_params, frame);
3086  if (res < 0)
3087  return res;
3088 
3089  nvenc_codec_specific_pic_params(avctx, frame, &pic_params, ctx->sei_data, sei_count);
3090  } else {
3091  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
3092  }
3093 
3094  res = nvenc_push_context(avctx);
3095  if (res < 0)
3096  return res;
3097 
3098  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
3099 
3100  for (i = 0; i < sei_count; i++)
3101  av_freep(&(ctx->sei_data[i].payload));
3102 
3103  res = nvenc_pop_context(avctx);
3104  if (res < 0)
3105  return res;
3106 
3107  if (nv_status != NV_ENC_SUCCESS &&
3108  nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
3109  return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
3110 
3111  if (frame && frame->buf[0]) {
3112  av_fifo_write(ctx->output_surface_queue, &in_surf, 1);
3113 
3114  if (avctx->codec_descriptor->props & AV_CODEC_PROP_REORDER)
3115  timestamp_queue_enqueue(ctx->timestamp_list, frame->pts);
3116  }
3117 
3118  /* all the pending buffers are now ready for output */
3119  if (nv_status == NV_ENC_SUCCESS) {
3120  while (av_fifo_read(ctx->output_surface_queue, &tmp_out_surf, 1) >= 0)
3121  av_fifo_write(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
3122  }
3123 
3124  return 0;
3125 }
3126 
3127 int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
3128 {
3129  NvencSurface *tmp_out_surf;
3130  int res, res2;
3131 
3132  NvencContext *ctx = avctx->priv_data;
3133 
3134  AVFrame *frame = ctx->frame;
3135 
3136  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
3137  return AVERROR(EINVAL);
3138 
3139  if (!frame->buf[0]) {
3140  res = ff_encode_get_frame(avctx, frame);
3141  if (res < 0 && res != AVERROR_EOF)
3142  return res;
3143  }
3144 
3145  res = nvenc_send_frame(avctx, frame);
3146  if (res < 0) {
3147  if (res != AVERROR(EAGAIN))
3148  return res;
3149  } else
3150  av_frame_unref(frame);
3151 
3152  if (output_ready(avctx, avctx->internal->draining)) {
3153  av_fifo_read(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
3154 
3155  res = nvenc_push_context(avctx);
3156  if (res < 0)
3157  return res;
3158 
3159  res = process_output_surface(avctx, pkt, tmp_out_surf);
3160 
3161  res2 = nvenc_pop_context(avctx);
3162  if (res2 < 0)
3163  return res2;
3164 
3165  if (res)
3166  return res;
3167 
3168  av_fifo_write(ctx->unused_surface_queue, &tmp_out_surf, 1);
3169  } else if (avctx->internal->draining) {
3170  return AVERROR_EOF;
3171  } else {
3172  return AVERROR(EAGAIN);
3173  }
3174 
3175  return 0;
3176 }
3177 
3178 av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
3179 {
3180  NvencContext *ctx = avctx->priv_data;
3181 
3182  nvenc_send_frame(avctx, NULL);
3183  av_fifo_reset2(ctx->timestamp_list);
3184  ctx->output_frame_num = 0;
3185  ctx->initial_delay_time = 0;
3186 }
error
static void error(const char *err)
Definition: target_bsf_fuzzer.c:32
flags
const SwsFlags flags[]
Definition: swscale.c:85
AVHWDeviceContext::hwctx
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:88
ff_alloc_a53_sei
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: atsc_a53.c:26
AV_LOG_WARNING
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:216
PRESET_ALIAS
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:204
AV_PIX_FMT_CUDA
@ AV_PIX_FMT_CUDA
HW acceleration through CUDA.
Definition: pixfmt.h:260
AV3DReferenceDisplay::num_sample_shift
int16_t num_sample_shift
The recommended additional horizontal shift for a stereo pair corresponding to the n-th reference bas...
Definition: tdrdi.h:141
AVMasteringDisplayMetadata::max_luminance
AVRational max_luminance
Max luminance of mastering display (cd/m^2).
Definition: mastering_display_metadata.h:57
AVPixelFormat
AVPixelFormat
Pixel format.
Definition: pixfmt.h:71
name
it s the only field you need to keep assuming you have a context There is some magic you don t need to care about around this just let it vf default minimum maximum flags name is the option name
Definition: writing_filters.txt:88
GUIDTuple::guid
const GUID guid
Definition: nvenc.c:200
level
uint8_t level
Definition: svq3.c:208
AV1_METADATA_TYPE_ITUT_T35
@ AV1_METADATA_TYPE_ITUT_T35
Definition: av1.h:47
av_clip
#define av_clip
Definition: common.h:100
AVERROR
Filter the word “frame” indicates either a video frame or a group of audio as stored in an AVFrame structure Format for each input and each output the list of supported formats For video that means pixel format For audio that means channel sample they are references to shared objects When the negotiation mechanism computes the intersection of the formats supported at each end of a all references to both lists are replaced with a reference to the intersection And when a single format is eventually chosen for a link amongst the remaining all references to the list are updated That means that if a filter requires that its input and output have the same format amongst a supported all it has to do is use a reference to the same list of formats query_formats can leave some formats unset and return AVERROR(EAGAIN) to cause the negotiation mechanism toagain later. That can be used by filters with complex requirements to use the format negotiated on one link to set the formats supported on another. Frame references ownership and permissions
AVCodecContext::colorspace
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:671
AVCodecContext::decoded_side_data
AVFrameSideData ** decoded_side_data
Array containing static side data, such as HDR10 CLL / MDCV structures.
Definition: avcodec.h:1929
av_frame_get_side_data
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:659
AV_PIX_FMT_BGR32
#define AV_PIX_FMT_BGR32
Definition: pixfmt.h:513
GUIDTuple
Definition: nvenc.c:199
GUIDTuple::flags
int flags
Definition: nvenc.c:201
av_pix_fmt_desc_get
const AVPixFmtDescriptor * av_pix_fmt_desc_get(enum AVPixelFormat pix_fmt)
Definition: pixdesc.c:3456
AVERROR_EOF
#define AVERROR_EOF
End of file.
Definition: error.h:57
AVBufferRef::data
uint8_t * data
The data buffer.
Definition: buffer.h:90
timecode_internal.h
AV_FRAME_DATA_A53_CC
@ AV_FRAME_DATA_A53_CC
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:59
AV_PROFILE_H264_MAIN
#define AV_PROFILE_H264_MAIN
Definition: defs.h:112
nvenc_push_context
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:326
AVMasteringDisplayMetadata::display_primaries
AVRational display_primaries[3][2]
CIE 1931 xy chromaticity coords of color primaries (r, g, b order).
Definition: mastering_display_metadata.h:42
AVHWFramesContext::format
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:200
AVPictureType
AVPictureType
Definition: avutil.h:276
output_ready
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:2666
NvencContext
Definition: nvenc.h:168
AV3DReferenceDisplaysInfo::prec_ref_viewing_dist
uint8_t prec_ref_viewing_dist
The exponent of the maximum allowable truncation error for {exponent,mantissa}_ref_viewing_distance a...
Definition: tdrdi.h:72
AVCodecContext::codec_descriptor
const struct AVCodecDescriptor * codec_descriptor
AVCodecDescriptor.
Definition: avcodec.h:1709
av_cold
#define av_cold
Definition: attributes.h:119
int64_t
long long int64_t
Definition: coverity.c:34
av_tdrdi_get_display
static av_always_inline AV3DReferenceDisplay * av_tdrdi_get_display(AV3DReferenceDisplaysInfo *tdrdi, unsigned int idx)
Definition: tdrdi.h:145
AV_PIX_FMT_YUV444P10MSB
#define AV_PIX_FMT_YUV444P10MSB
Definition: pixfmt.h:554
AV_FRAME_DATA_S12M_TIMECODE
@ AV_FRAME_DATA_S12M_TIMECODE
Timecode which conforms to SMPTE ST 12-1.
Definition: frame.h:152
AV_PROFILE_HEVC_MAIN
#define AV_PROFILE_HEVC_MAIN
Definition: defs.h:159
NvencSurface::in_ref
AVFrame * in_ref
Definition: nvenc.h:86
av_frame_free
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:64
AVContentLightMetadata::MaxCLL
unsigned MaxCLL
Max content light level (cd/m^2).
Definition: mastering_display_metadata.h:111
nvenc_store_frame_data
static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
Definition: nvenc.c:2519
av_fifo_peek
int av_fifo_peek(const AVFifo *f, void *buf, size_t nb_elems, size_t offset)
Read data from a FIFO without modifying FIFO state.
Definition: fifo.c:255
AV3DReferenceDisplay
Data structure for single deference display information.
Definition: tdrdi.h:100
AVFrame
This structure describes decoded (raw) audio or video data.
Definition: frame.h:466
pixdesc.h
AVCodecContext::color_trc
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:664
nvenc_set_timestamp
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:2462
AVCOL_RANGE_JPEG
@ AVCOL_RANGE_JPEG
Full range content.
Definition: pixfmt.h:777
internal.h
AVPacket::data
uint8_t * data
Definition: packet.h:603
NVENC_LOWLATENCY
@ NVENC_LOWLATENCY
Definition: nvenc.h:151
encode.h
AVCodecContext::b_quant_offset
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:797
NvencFrameData
Definition: nvenc.h:96
reconfig_encoder
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2790
AV_LOG_VERBOSE
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:226
AVCOL_SPC_RGB
@ AVCOL_SPC_RGB
order of coefficients is actually GBR, also IEC 61966-2-1 (sRGB), YZX and ST 428-1
Definition: pixfmt.h:701
timestamp_queue_peek
static int64_t timestamp_queue_peek(AVFifo *queue, size_t index)
Definition: nvenc.c:2454
ff_nvenc_pix_fmts
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:53
set_constqp
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:805
NvencSurface
Definition: nvenc.h:83
AVPacket::duration
int64_t duration
Duration of this packet in AVStream->time_base units, 0 if unknown.
Definition: packet.h:621
mathematics.h
FFMAX
#define FFMAX(a, b)
Definition: macros.h:47
av_buffer_ref
AVBufferRef * av_buffer_ref(const AVBufferRef *buf)
Create a new reference to an AVBuffer.
Definition: buffer.c:103
nvenc_print_error
static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:182
AVERROR_UNKNOWN
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:73
AVCodecContext::qmax
int qmax
maximum quantizer
Definition: avcodec.h:1259
nverr
NVENCSTATUS nverr
Definition: nvenc.c:135
NONE
#define NONE
Definition: vf_drawvg.c:262
set_lossless
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:920
PRESET
#define PRESET(name,...)
Definition: nvenc.c:207
AV_PKT_FLAG_KEY
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: packet.h:650
dummy
static int dummy
Definition: ffplay.c:3751
ff_nvenc_encode_flush
av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
Definition: nvenc.c:3178
AV_STEREO3D_UNSPEC
@ AV_STEREO3D_UNSPEC
Video is stereoscopic but the packing is unspecified.
Definition: stereo3d.h:143
AV_PIX_FMT_P212
#define AV_PIX_FMT_P212
Definition: pixfmt.h:618
AV_PIX_FMT_YUV444P12MSB
#define AV_PIX_FMT_YUV444P12MSB
Definition: pixfmt.h:555
AV_CODEC_FLAG_GLOBAL_HEADER
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:318
ff_timecode_set_smpte
void ff_timecode_set_smpte(unsigned *drop, unsigned *hh, unsigned *mm, unsigned *ss, unsigned *ff, AVRational rate, uint32_t tcsmpte, int prevent_df, int skip_field)
Convert SMPTE 12M binary representation to sei info.
Definition: timecode_internal.c:33
nvenc.h
AV_FRAME_FLAG_TOP_FIELD_FIRST
#define AV_FRAME_FLAG_TOP_FIELD_FIRST
A flag to mark frames where the top field is displayed first if the content is interlaced.
Definition: frame.h:694
av_memdup
void * av_memdup(const void *p, size_t size)
Duplicate a buffer with av_malloc().
Definition: mem.c:304
AV_HWDEVICE_TYPE_CUDA
@ AV_HWDEVICE_TYPE_CUDA
Definition: hwcontext.h:30
AVContentLightMetadata
Content light level needed by to transmit HDR over HDMI (CTA-861.3).
Definition: mastering_display_metadata.h:107
compute_dar
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1634
AV3DReferenceDisplaysInfo
This structure describes information about the reference display width(s) and reference viewing dista...
Definition: tdrdi.h:53
NV_ENC_HEVC_PROFILE_MAIN_10
@ NV_ENC_HEVC_PROFILE_MAIN_10
Definition: nvenc.h:141
AVCodecContext::framerate
AVRational framerate
Definition: avcodec.h:563
AVCOL_SPC_BT470BG
@ AVCOL_SPC_BT470BG
also ITU-R BT601-6 625 / ITU-R BT1358 625 / ITU-R BT1700 625 PAL & SECAM / IEC 61966-2-4 xvYCC601
Definition: pixfmt.h:706
nvenc_upload_frame
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:2277
NV_ENC_HEVC_PROFILE_REXT
@ NV_ENC_HEVC_PROFILE_REXT
Definition: nvenc.h:142
NvencDynLoadFunctions::nvenc_device_count
int nvenc_device_count
Definition: nvenc.h:110
AV_CODEC_FLAG_COPY_OPAQUE
#define AV_CODEC_FLAG_COPY_OPAQUE
Definition: avcodec.h:279
AVCodecContext::i_quant_factor
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:806
set_vbr
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:843
nvenc_map_error
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:167
AVCodecContext::codec
const struct AVCodec * codec
Definition: avcodec.h:452
AVPacket::opaque_ref
AVBufferRef * opaque_ref
AVBufferRef for free use by the API user.
Definition: packet.h:639
nvenc_check_cap
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:411
presets
static const Preset presets[]
Definition: vf_pseudocolor.c:286
nvenc_errors
static const struct @235 nvenc_errors[]
av_fifo_write
int av_fifo_write(AVFifo *f, const void *buf, size_t nb_elems)
Write data into a FIFO.
Definition: fifo.c:188
AV_STEREO3D_2D
@ AV_STEREO3D_2D
Video is not stereoscopic (and metadata has to be there).
Definition: stereo3d.h:52
NvencSurface::format
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:93
nvenc_setup_rate_control
static av_cold int nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:996
sei.h
AVCodecContext::refs
int refs
number of reference frames
Definition: avcodec.h:701
AV_HWDEVICE_TYPE_D3D11VA
@ AV_HWDEVICE_TYPE_D3D11VA
Definition: hwcontext.h:35
nvenc_map_preset
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:209
AVCodecContext::flags
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:500
val
static double val(void *priv, double ch)
Definition: aeval.c:77
nvenc_copy_frame
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:2159
AVERROR_BUFFER_TOO_SMALL
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:53
hwcontext_cuda.h
av_image_fill_pointers
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:145
ss
#define ss(width, name, subs,...)
Definition: cbs_vp9.c:202
IS_GBRP
#define IS_GBRP(pix_fmt)
Definition: nvenc.c:130
ff_encode_add_stats_side_data
int ff_encode_add_stats_side_data(AVPacket *pkt, int quality, const int64_t error[], int error_count, enum AVPictureType pict_type)
Definition: encode.c:972
AVCUDADeviceContext::cuda_ctx
CUcontext cuda_ctx
Definition: hwcontext_cuda.h:43
av_reduce
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
nvenc_print_driver_requirement
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:236
AVRational::num
int num
Numerator.
Definition: rational.h:59
AV_CODEC_FLAG_INTERLACED_DCT
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:310
nvenc_check_capabilities
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:428
AVHWDeviceContext
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:63
av_frame_alloc
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:52
AVCodecContext::color_primaries
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:657
AV_STEREO3D_FRAMESEQUENCE
@ AV_STEREO3D_FRAMESEQUENCE
Views are alternated temporally.
Definition: stereo3d.h:89
AV_LOG_ERROR
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:210
AVFrameSideData::size
size_t size
Definition: frame.h:324
FF_ARRAY_ELEMS
#define FF_ARRAY_ELEMS(a)
Definition: sinewin_tablegen.c:29
to_nv_color_pri
#define to_nv_color_pri(n)
Definition: nvenc.c:278
av_fifo_read
int av_fifo_read(AVFifo *f, void *buf, size_t nb_elems)
Read data from a FIFO.
Definition: fifo.c:240
P2
#define P2
Definition: cavsdsp.c:36
AV_PIX_FMT_YUVJ422P
@ AV_PIX_FMT_YUVJ422P
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:86
AVCodecContext::extradata_size
int extradata_size
Definition: avcodec.h:527
AVCodecContext::has_b_frames
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:709
ff_nvenc_encode_init
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:2096
av_fast_realloc
void * av_fast_realloc(void *ptr, unsigned int *size, size_t min_size)
Reallocate the given buffer if it is not large enough, otherwise do nothing.
Definition: mem.c:497
stereo3d.h
AVMasteringDisplayMetadata::white_point
AVRational white_point[2]
CIE 1931 xy chromaticity coords of white point.
Definition: mastering_display_metadata.h:47
AVCodecContext::global_quality
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:1235
AVD3D11VADeviceContext::device
ID3D11Device * device
Device used for texture creation and access.
Definition: hwcontext_d3d11va.h:56
AV_PIX_FMT_YUV444P16
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:552
AVFormatContext::flags
int flags
Flags modifying the (de)muxer behaviour.
Definition: avformat.h:1465
AVCodecContext::nb_decoded_side_data
int nb_decoded_side_data
Definition: avcodec.h:1930
AV_PIX_FMT_0BGR32
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:516
pix_fmt
static enum AVPixelFormat pix_fmt
Definition: demux_decode.c:41
NvencDynLoadFunctions
Definition: nvenc.h:104
AV_PROFILE_H264_HIGH_10
#define AV_PROFILE_H264_HIGH_10
Definition: defs.h:115
ctx
static AVFormatContext * ctx
Definition: movenc.c:49
SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
@ SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
Definition: sei.h:34
av_rescale_q
int64_t av_rescale_q(int64_t a, AVRational bq, AVRational cq)
Rescale a 64-bit integer by 2 rational numbers.
Definition: mathematics.c:142
AV_FRAME_DATA_3D_REFERENCE_DISPLAYS
@ AV_FRAME_DATA_3D_REFERENCE_DISPLAYS
This side data contains information about the reference display width(s) and reference viewing distan...
Definition: frame.h:256
nvenc_setup_extradata
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:1977
timestamp_queue_enqueue
static void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
Definition: nvenc.c:2440
P1
#define P1
Definition: cavsdsp.c:37
AV_PIX_FMT_YUV420P
@ AV_PIX_FMT_YUV420P
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:73
AVCodecContext::rc_max_rate
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:1288
timestamp_queue_dequeue
static int64_t timestamp_queue_dequeue(AVFifo *queue)
Definition: nvenc.c:2445
av_mallocz
#define av_mallocz(s)
Definition: tableprint_vlc.h:31
AVPacket::opaque
void * opaque
for some private data of the user
Definition: packet.h:628
NvencDynLoadFunctions::nvenc_dl
NvencFunctions * nvenc_dl
Definition: nvenc.h:107
AVCPBProperties
This structure describes the bitrate properties of an encoded bitstream.
Definition: defs.h:282
AV_CODEC_ID_H264
@ AV_CODEC_ID_H264
Definition: codec_id.h:77
NvencSurface::pitch
int pitch
Definition: nvenc.h:90
tmp
static uint8_t tmp[40]
Definition: aes_ctr.c:52
AV_PIX_FMT_YUVJ444P
@ AV_PIX_FMT_YUVJ444P
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:87
AV_PROFILE_H264_HIGH_422
#define AV_PROFILE_H264_HIGH_422
Definition: defs.h:118
AVCodecContext::codec_id
enum AVCodecID codec_id
Definition: avcodec.h:453
NvencSurface::input_surface
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:85
AVCodecDescriptor::props
int props
Codec properties, a combination of AV_CODEC_PROP_* flags.
Definition: codec_desc.h:54
if
if(ret)
Definition: filter_design.txt:179
AVCodecContext::rc_buffer_size
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:1273
NVENC_CAP
#define NVENC_CAP
Definition: nvenc.c:49
fail
#define fail
Definition: test.h:478
AV_PIX_FMT_GBRP16
#define AV_PIX_FMT_GBRP16
Definition: pixfmt.h:561
IS_10BIT
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:95
AV3DReferenceDisplaysInfo::ref_viewing_distance_flag
uint8_t ref_viewing_distance_flag
A flag to indicate the presence of reference viewing distance.
Definition: tdrdi.h:65
fabs
static __device__ float fabs(float a)
Definition: cuda_runtime.h:182
NULL
#define NULL
Definition: coverity.c:32
AVHWFramesContext::sw_format
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:213
IS_YUV422
#define IS_YUV422(pix_fmt)
Definition: nvenc.c:125
NvencSurface::reg_idx
int reg_idx
Definition: nvenc.h:87
AVCodecContext::color_range
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:681
av_buffer_unref
void av_buffer_unref(AVBufferRef **buf)
Free a given reference and automatically free the buffer if there are no more references to it.
Definition: buffer.c:139
SEI_TYPE_TIME_CODE
@ SEI_TYPE_TIME_CODE
Definition: sei.h:95
AV_CODEC_ID_AV1
@ AV_CODEC_ID_AV1
Definition: codec_id.h:275
NV_ENC_H264_PROFILE_HIGH_444P
@ NV_ENC_H264_PROFILE_HIGH_444P
Definition: nvenc.h:136
AVRational
Rational number (pair of numerator and denominator).
Definition: rational.h:58
AVCodecContext::internal
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:478
AV_PIX_FMT_YUVJ420P
@ AV_PIX_FMT_YUVJ420P
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:85
AVCodecContext::bit_rate
int64_t bit_rate
the average bitrate
Definition: avcodec.h:493
av_fallthrough
#define av_fallthrough
Definition: attributes.h:67
ff_nvenc_encode_close
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:2011
FrameData::duration
int64_t duration
Definition: librav1e.c:60
AV_PICTURE_TYPE_I
@ AV_PICTURE_TYPE_I
Intra.
Definition: avutil.h:278
AV3DReferenceDisplay::exponent_ref_display_width
uint8_t exponent_ref_display_width
The exponent part of the reference display width of the n-th reference display.
Definition: tdrdi.h:114
P3
#define P3
Definition: dsp_template.c:820
av_fifo_can_read
size_t av_fifo_can_read(const AVFifo *f)
Definition: fifo.c:87
flush
void(* flush)(AVBSFContext *ctx)
Definition: dts2pts.c:581
FrameData::frame_opaque
void * frame_opaque
Definition: librav1e.c:62
NvencDynLoadFunctions::cuda_dl
CudaFunctions * cuda_dl
Definition: nvenc.h:106
AV_FRAME_DATA_MASTERING_DISPLAY_METADATA
@ AV_FRAME_DATA_MASTERING_DISPLAY_METADATA
Mastering display metadata associated with a video frame.
Definition: frame.h:120
nvenc_setup_h264_config
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:1138
AV3DReferenceDisplaysInfo::prec_ref_display_width
uint8_t prec_ref_display_width
The exponent of the maximum allowable truncation error for {exponent,mantissa}_ref_display_width as g...
Definition: tdrdi.h:58
NV_ENC_HEVC_PROFILE_MAIN
@ NV_ENC_HEVC_PROFILE_MAIN
Definition: nvenc.h:140
AVPixFmtDescriptor::flags
uint64_t flags
Combination of AV_PIX_FMT_FLAG_...
Definition: pixdesc.h:94
AV_PROFILE_HEVC_MAIN_10
#define AV_PROFILE_HEVC_MAIN_10
Definition: defs.h:160
NV_ENC_H264_PROFILE_HIGH
@ NV_ENC_H264_PROFILE_HIGH
Definition: nvenc.h:129
AV_PROFILE_HEVC_REXT
#define AV_PROFILE_HEVC_REXT
Definition: defs.h:162
index
int index
Definition: gxfenc.c:90
AV_FRAME_DATA_SEI_UNREGISTERED
@ AV_FRAME_DATA_SEI_UNREGISTERED
User data unregistered metadata associated with a video frame.
Definition: frame.h:178
AV1_METADATA_TYPE_TIMECODE
@ AV1_METADATA_TYPE_TIMECODE
Definition: av1.h:48
AVCodecContext::time_base
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented.
Definition: avcodec.h:547
av_fifo_reset2
void av_fifo_reset2(AVFifo *f)
Definition: fifo.c:280
AV_PIX_FMT_X2BGR10
#define AV_PIX_FMT_X2BGR10
Definition: pixfmt.h:614
AVCUDADeviceContext::stream
CUstream stream
Definition: hwcontext_cuda.h:44
desc
const char * desc
Definition: nvenc.c:137
nvenc_pop_context
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:337
HW_CONFIG_ENCODER_DEVICE
#define HW_CONFIG_ENCODER_DEVICE(format, device_type_)
Definition: hwconfig.h:95
AVFifo
Definition: fifo.c:35
AVCodecContext::gop_size
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:1021
height
#define height
Definition: dsp.h:89
av_frame_ref
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:278
AV_PIX_FMT_P012
#define AV_PIX_FMT_P012
Definition: pixfmt.h:603
nvenc_check_codec_support
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:375
AV_PIX_FMT_FLAG_RGB
#define AV_PIX_FMT_FLAG_RGB
The pixel format contains RGB-like data (as opposed to YUV/grayscale).
Definition: pixdesc.h:136
AV_CODEC_PROP_REORDER
#define AV_CODEC_PROP_REORDER
Codec supports frame reordering.
Definition: codec_desc.h:92
ff_nvenc_hw_configs
const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[]
Definition: nvenc.c:85
i
#define i(width, name, range_min, range_max)
Definition: cbs_h264.c:63
MAX_REGISTERED_FRAMES
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:41
ff_alloc_timecode_sei
int ff_alloc_timecode_sei(const AVFrame *frame, AVRational rate, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for S12M timecode side data and allocate and fill TC SEI message with timecode info.
Definition: utils.c:974
P6
#define P6
Definition: filter_template.c:407
for
for(k=2;k<=8;++k)
Definition: h264pred_template.c:424
nvenc_alloc_surface
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:1875
AV_NOPTS_VALUE
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:247
NVENC_TWO_PASSES
@ NVENC_TWO_PASSES
Definition: nvenc.h:154
NVENC_LOSSLESS
@ NVENC_LOSSLESS
Definition: nvenc.h:152
AVFrameSideData::data
uint8_t * data
Definition: frame.h:323
nvenc_check_device
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:617
nvenc_register_frame
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2223
AVCodecHWConfigInternal
Definition: hwconfig.h:25
frame_data
FrameData * frame_data(AVFrame *frame)
Get our axiliary frame data attached to the frame, allocating it if needed.
Definition: ffmpeg.c:477
AV_PIX_FMT_NV16
@ AV_PIX_FMT_NV16
interleaved chroma YUV 4:2:2, 16bpp, (1 Cr & Cb sample per 2x1 Y samples)
Definition: pixfmt.h:198
ff_nvenc_receive_packet
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:3127
AVPacket::dts
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed.
Definition: packet.h:602
AV_PIX_FMT_RGB32
#define AV_PIX_FMT_RGB32
Definition: pixfmt.h:511
nvenc_override_rate_control
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:934
AVERROR_EXTERNAL
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:59
AVPacket::flags
int flags
A combination of AV_PKT_FLAG values.
Definition: packet.h:609
AV_PIX_FMT_D3D11
@ AV_PIX_FMT_D3D11
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:336
AV_PIX_FMT_P216
#define AV_PIX_FMT_P216
Definition: pixfmt.h:620
FrameData::frame_opaque_ref
AVBufferRef * frame_opaque_ref
Definition: librav1e.c:63
xf
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:622
AVCPBProperties::avg_bitrate
int64_t avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: defs.h:297
AV_PIX_FMT_P210
#define AV_PIX_FMT_P210
Definition: pixfmt.h:616
ANY_DEVICE
@ ANY_DEVICE
Definition: nvenc.h:159
get_free_frame
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:2148
AV_LOG_INFO
#define AV_LOG_INFO
Standard information.
Definition: log.h:221
AVCodecContext::b_quant_factor
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:790
AV_FRAME_DATA_VIEW_ID
@ AV_FRAME_DATA_VIEW_ID
This side data must be associated with a video frame.
Definition: frame.h:245
AVCodec::id
enum AVCodecID id
Definition: codec.h:183
nvenc_open_session
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:349
HW_CONFIG_ENCODER_FRAMES
#define HW_CONFIG_ENCODER_FRAMES(format, device_type_)
Definition: hwconfig.h:98
AV_FRAME_DATA_CONTENT_LIGHT_LEVEL
@ AV_FRAME_DATA_CONTENT_LIGHT_LEVEL
Content light level (based on CTA-861.3).
Definition: frame.h:137
NV_ENC_H264_PROFILE_MAIN
@ NV_ENC_H264_PROFILE_MAIN
Definition: nvenc.h:128
AV3DReferenceDisplay::right_view_id
uint16_t right_view_id
The ViewId of the left view of a stereo pair corresponding to the n-th reference display.
Definition: tdrdi.h:109
av_malloc
#define av_malloc(s)
Definition: ops_asmgen.c:44
AVPacket::pts
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: packet.h:596
FAST
@ FAST
Definition: vf_guided.c:32
AVCodecContext::extradata
uint8_t * extradata
Out-of-band global headers that may be used by some codecs.
Definition: avcodec.h:526
process_output_surface
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:2566
nvenc_load_libraries
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:282
nvenc_recalc_surfaces
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:953
AVD3D11VADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_d3d11va.h:45
IS_RGB
#define IS_RGB(pix_fmt)
Definition: nvenc.c:109
AVCPBProperties::max_bitrate
int64_t max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: defs.h:287
AV_CODEC_ID_HEVC
@ AV_CODEC_ID_HEVC
Definition: codec_id.h:223
prepare_sei_data_array
static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2678
AV_FRAME_DATA_STEREO3D
@ AV_FRAME_DATA_STEREO3D
Stereoscopic 3d metadata.
Definition: frame.h:64
FFMIN
#define FFMIN(a, b)
Definition: macros.h:49
av_frame_unref
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:496
AV_PIX_FMT_X2RGB10
#define AV_PIX_FMT_X2RGB10
Definition: pixfmt.h:613
AV3DReferenceDisplay::mantissa_ref_display_width
uint8_t mantissa_ref_display_width
The mantissa part of the reference display width of the n-th reference display.
Definition: tdrdi.h:119
AVCodecContext::hw_device_ctx
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:1493
AVMasteringDisplayMetadata
Mastering display metadata capable of representing the color volume of the display used to master the...
Definition: mastering_display_metadata.h:38
IS_YUV444
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:116
NVENC_ONE_PASS
@ NVENC_ONE_PASS
Definition: nvenc.h:153
IS_CBR
#define IS_CBR(rc)
Definition: nvenc.c:51
av_rescale
int64_t av_rescale(int64_t a, int64_t b, int64_t c)
Rescale a 64-bit integer with rounding to nearest.
Definition: mathematics.c:129
AVCodecContext::height
int height
Definition: avcodec.h:604
AVCodecContext::pix_fmt
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:643
CHECK_CU
#define CHECK_CU(x)
Definition: nvenc.c:47
nvenc_map_buffer_format
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:1832
av_calloc
void * av_calloc(size_t nmemb, size_t size)
Definition: mem.c:264
AV_PIX_FMT_P016
#define AV_PIX_FMT_P016
Definition: pixfmt.h:604
AVCodecContext::hw_frames_ctx
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames.
Definition: avcodec.h:1471
NvencSurface::width
int width
Definition: nvenc.h:88
AVHWFramesContext
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:118
AVCUDADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_cuda.h:42
AV_PROFILE_H264_HIGH_444_PREDICTIVE
#define AV_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: defs.h:122
ret
ret
Definition: filter_design.txt:187
AV_LOG_FATAL
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:204
AVHWDeviceContext::type
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:75
nvenc_setup_encoder
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1667
AV_PIX_FMT_NV12
@ AV_PIX_FMT_NV12
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:96
FFSWAP
#define FFSWAP(type, a, b)
Definition: macros.h:52
frame
these buffered frames must be flushed immediately if a new input produces new the filter must not call request_frame to get more It must just process the frame or queue it The task of requesting more frames is left to the filter s request_frame method or the application If a filter has several the filter must be ready for frames arriving randomly on any input any filter with several inputs will most likely require some kind of queuing mechanism It is perfectly acceptable to have a limited queue and to drop frames when the inputs are too unbalanced request_frame For filters that do not use the this method is called when a frame is wanted on an output For a it should directly call filter_frame on the corresponding output For a if there are queued frames already one of these frames should be pushed If the filter should request a frame on one of its repeatedly until at least one frame has been pushed Return or at least make progress towards producing a frame
Definition: filter_design.txt:265
averr
int averr
Definition: nvenc.c:136
AV_PIX_FMT_0RGB32
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:515
AVHWFramesContext::device_ctx
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:137
AVCPBProperties::buffer_size
int64_t buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: defs.h:303
cuda_check.h
atsc_a53.h
AVStereo3D::type
enum AVStereo3DType type
How views are packed within the video.
Definition: stereo3d.h:207
AV_PROFILE_H264_BASELINE
#define AV_PROFILE_H264_BASELINE
Definition: defs.h:110
NVENC_RGB_MODE_DISABLED
@ NVENC_RGB_MODE_DISABLED
Definition: nvenc.h:163
AV3DReferenceDisplay::mantissa_ref_viewing_distance
uint8_t mantissa_ref_viewing_distance
The mantissa part of the reference viewing distance of the n-th reference display.
Definition: tdrdi.h:129
av_fifo_alloc2
AVFifo * av_fifo_alloc2(size_t nb_elems, size_t elem_size, unsigned int flags)
Allocate and initialize an AVFifo with a given element size.
Definition: fifo.c:47
AV_INPUT_BUFFER_PADDING_SIZE
#define AV_INPUT_BUFFER_PADDING_SIZE
Definition: defs.h:40
AVCodecContext
main external API structure.
Definition: avcodec.h:443
AV_PROFILE_H264_HIGH
#define AV_PROFILE_H264_HIGH
Definition: defs.h:114
AV_PICTURE_TYPE_B
@ AV_PICTURE_TYPE_B
Bi-dir predicted.
Definition: avutil.h:280
ff_get_encode_buffer
int ff_get_encode_buffer(AVCodecContext *avctx, AVPacket *avpkt, int64_t size, int flags)
Get a buffer for a packet.
Definition: encode.c:105
NvencSurface::height
int height
Definition: nvenc.h:89
SEI_TYPE_USER_DATA_UNREGISTERED
@ SEI_TYPE_USER_DATA_UNREGISTERED
Definition: sei.h:35
av_image_copy2
static void av_image_copy2(uint8_t *const dst_data[4], const int dst_linesizes[4], uint8_t *const src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Wrapper around av_image_copy() to workaround the limitation that the conversion from uint8_t * const ...
Definition: imgutils.h:184
AVCodecContext::qmin
int qmin
minimum quantizer
Definition: avcodec.h:1252
AVRational::den
int den
Denominator.
Definition: rational.h:60
AV_PIX_FMT_NONE
@ AV_PIX_FMT_NONE
Definition: pixfmt.h:72
AVCodecContext::profile
int profile
profile
Definition: avcodec.h:1636
nvenc_setup_surfaces
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1931
AV3DReferenceDisplay::additional_shift_present_flag
uint8_t additional_shift_present_flag
An array of flags to indicates that the information about additional horizontal shift of the left and...
Definition: tdrdi.h:135
AVCodecContext::i_quant_offset
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:813
AVFrameSideData::type
enum AVFrameSideDataType type
Definition: frame.h:322
NvencSurface::output_surface
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:92
AV_PROFILE_HEVC_MULTIVIEW_MAIN
#define AV_PROFILE_HEVC_MULTIVIEW_MAIN
Definition: defs.h:163
nvenc_find_free_reg_resource
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:2189
nvenc_codec_specific_pic_params
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data, int sei_count)
Definition: nvenc.c:2389
AVMasteringDisplayMetadata::min_luminance
AVRational min_luminance
Min luminance of mastering display (cd/m^2).
Definition: mastering_display_metadata.h:52
AV_PIX_FMT_YUV444P
@ AV_PIX_FMT_YUV444P
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:78
P7
#define P7
Definition: filter_template.c:406
AV_PIX_FMT_P010
#define AV_PIX_FMT_P010
Definition: pixfmt.h:602
AVCodecInternal::draining
int draining
decoding: AVERROR_EOF has been returned from ff_decode_get_packet(); must not be used by decoders tha...
Definition: internal.h:139
AV_PIX_FMT_GBRP
@ AV_PIX_FMT_GBRP
planar GBR 4:4:4 24bpp
Definition: pixfmt.h:165
AV3DReferenceDisplaysInfo::num_ref_displays
uint8_t num_ref_displays
The number of reference displays that are signalled in this struct.
Definition: tdrdi.h:78
NvencDynLoadFunctions::nvenc_funcs
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:109
AV_PICTURE_TYPE_P
@ AV_PICTURE_TYPE_P
Predicted.
Definition: avutil.h:279
mem.h
AVCodecContext::max_b_frames
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:781
ff_encode_get_frame
int ff_encode_get_frame(AVCodecContext *avctx, AVFrame *frame)
Called by encoders to get the next frame for encoding.
Definition: encode.c:217
AV3DReferenceDisplay::exponent_ref_viewing_distance
uint8_t exponent_ref_viewing_distance
The exponent part of the reference viewing distance of the n-th reference display.
Definition: tdrdi.h:124
mastering_display_metadata.h
AVFrameSideData
Structure to hold side data for an AVFrame.
Definition: frame.h:321
AVPixFmtDescriptor
Descriptor that unambiguously describes how the bits of a pixel are stored in the up to 4 data planes...
Definition: pixdesc.h:69
P4
#define P4
Definition: filter_template.c:409
LIST_DEVICES
@ LIST_DEVICES
Definition: nvenc.h:158
av_free
#define av_free(p)
Definition: tableprint_vlc.h:34
AVCodecContext::slices
int slices
Number of slices.
Definition: avcodec.h:1037
to_nv_color_matrix
#define to_nv_color_matrix(n)
Definition: nvenc.c:277
AVContentLightMetadata::MaxFALL
unsigned MaxFALL
Max average light level per frame (cd/m^2).
Definition: mastering_display_metadata.h:116
AVPacket
This structure stores compressed data.
Definition: packet.h:580
to_nv_color_trc
#define to_nv_color_trc(n)
Definition: nvenc.c:279
AVCodecContext::priv_data
void * priv_data
Definition: avcodec.h:470
av_freep
#define av_freep(p)
Definition: tableprint_vlc.h:35
AV_PICTURE_TYPE_BI
@ AV_PICTURE_TYPE_BI
BI type.
Definition: avutil.h:284
nvenc_setup_device
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:692
P5
#define P5
Definition: filter_template.c:408
av_frame_side_data_get
static const AVFrameSideData * av_frame_side_data_get(AVFrameSideData *const *sd, const int nb_sd, enum AVFrameSideDataType type)
Wrapper around av_frame_side_data_get_c() to workaround the limitation that for any type T the conver...
Definition: frame.h:1190
AVCodecContext::width
int width
picture width / height.
Definition: avcodec.h:604
imgutils.h
hwcontext.h
AVERROR_BUG
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:52
av_log
#define av_log(a,...)
Definition: tableprint_vlc.h:27
av_fifo_freep2
void av_fifo_freep2(AVFifo **f)
Free an AVFifo and reset pointer to NULL.
Definition: fifo.c:286
AVERROR_EXIT
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:58
AV_PIX_FMT_GBRP10MSB
#define AV_PIX_FMT_GBRP10MSB
Definition: pixfmt.h:568
ff_encode_add_cpb_side_data
AVCPBProperties * ff_encode_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: encode.c:941
AVStereo3D
Stereo 3D type: this structure describes how two videos are packed within a single video surface,...
Definition: stereo3d.h:203
pkt
static AVPacket * pkt
Definition: demux_decode.c:55
nvenc_setup_codec_config
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1617
width
#define width
Definition: dsp.h:89
FF_QP2LAMBDA
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:226
AV3DReferenceDisplay::left_view_id
uint16_t left_view_id
The ViewId of the left view of a stereo pair corresponding to the n-th reference display.
Definition: tdrdi.h:104
AV_PROFILE_AV1_MAIN
#define AV_PROFILE_AV1_MAIN
Definition: defs.h:169
codec_desc.h
NV_ENC_H264_PROFILE_BASELINE
@ NV_ENC_H264_PROFILE_BASELINE
Definition: nvenc.h:127
AVCodecContext::sample_aspect_ratio
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel.
Definition: avcodec.h:628
nvenc_setup_hevc_config
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1317
tdrdi.h
nvenc_send_frame
static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2954
av_get_pix_fmt_name
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:3376
nvenc_retrieve_frame_data
static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
Definition: nvenc.c:2545
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