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30 #define HWCAP_RV(letter) (1ul << ((letter) - 'A'))
32 #if HAVE_SYS_HWPROBE_H
33 #include <sys/hwprobe.h>
34 #elif HAVE_ASM_HWPROBE_H
35 #include <asm/hwprobe.h>
36 #include <sys/syscall.h>
39 static int __riscv_hwprobe(
struct riscv_hwprobe *pairs,
size_t pair_count,
43 return syscall(__NR_riscv_hwprobe, pairs, pair_count,
cpu_count,
cpus,
51 #if HAVE_SYS_HWPROBE_H || HAVE_ASM_HWPROBE_H
52 struct riscv_hwprobe pairs[] = {
53 { RISCV_HWPROBE_KEY_BASE_BEHAVIOR, 0 },
54 { RISCV_HWPROBE_KEY_IMA_EXT_0, 0 },
55 { RISCV_HWPROBE_KEY_CPUPERF_0, 0 },
59 if (pairs[0].
value & RISCV_HWPROBE_BASE_BEHAVIOR_IMA)
61 if (pairs[1].
value & RISCV_HWPROBE_IMA_FD)
63 #ifdef RISCV_HWPROBE_IMA_V
64 if (pairs[1].
value & RISCV_HWPROBE_IMA_V)
68 #ifdef RISCV_HWPROBE_EXT_ZBA
69 if (pairs[1].
value & RISCV_HWPROBE_EXT_ZBA)
72 #ifdef RISCV_HWPROBE_EXT_ZBB
73 if (pairs[1].
value & RISCV_HWPROBE_EXT_ZBB)
76 #ifdef RISCV_HWPROBE_EXT_ZVBB
77 if (pairs[1].
value & RISCV_HWPROBE_EXT_ZVBB)
80 if (pairs[2].
value & RISCV_HWPROBE_MISALIGNED_FAST)
86 const unsigned long hwcap = getauxval(AT_HWCAP);
88 if (hwcap & HWCAP_RV(
'I'))
90 if (hwcap & HWCAP_RV(
'F'))
92 if (hwcap & HWCAP_RV(
'D'))
96 if (hwcap & HWCAP_RV(
'V'))
105 #if defined (__riscv_flen) && (__riscv_flen >= 32)
107 #if (__riscv_flen >= 64)
120 #ifdef __riscv_vector
122 #if __riscv_v_elen >= 64
125 #if __riscv_v_elen_fp >= 32
127 #if __riscv_v_elen_fp >= 64
static atomic_int cpu_count
#define AV_CPU_FLAG_RVB_BASIC
Basic bit-manipulations.
#define AV_CPU_FLAG_RV_ZVBB
Vector basic bit-manipulations.
#define AV_CPU_FLAG_RVF
F (single precision FP)
#define AV_CPU_FLAG_RVV_F64
Vectors of double's.
#define AV_CPU_FLAG_RVV_F32
Vectors of float's */.
#define FF_ARRAY_ELEMS(a)
#define AV_CPU_FLAG_RVB_ADDR
Address bit-manipulations.
#define AV_CPU_FLAG_RVD
D (double precision FP)
static const struct @413 cpus[]
#define AV_CPU_FLAG_RV_MISALIGNED
Fast misaligned accesses.
#define AV_CPU_FLAG_RVV_I32
Vectors of 8/16/32-bit int's */.
it s the only field you need to keep assuming you have a context There is some magic you don t need to care about around this just let it vf default value
#define AV_CPU_FLAG_RVI
I (full GPR bank)
#define flags(name, subs,...)
#define AV_CPU_FLAG_RVV_I64
Vectors of 64-bit int's */.
int ff_get_cpu_flags_riscv(void)